I am working with the W7500P IOP and I am trying to allow my program to use 48k of SRAM based on the information provided at Wiznet’s website: SRAM: 16KB to 48 KB ( Min 16KB available if 32KB socket buffer is used, Max 48KB available if no socket buffer is used)
However, I am having trouble to disable the socket buffer.
Thanks for answering lawrence and for the information shared.
I have developed a function that allocates memory until malloc answer null in order to measure how much memory is still available and even though I change Sn_TXBUF_SIZE and Sn_RXBUF_SIZE registers, the result is always the same (~8KB). Is this happening because the memories are not a single-memory of 48KB and the heap cannot use two different memories at the same time?
Do I have to change the Read/Write Memory Areas at Keil (memory remap) in order to be able to use the extra memory released from the sockets?
I assume there are two SRAMs: 16KB and 32KB. Is this correct? If so, can I have 3 sockets enabled (3 x [2KB + 2KB] = 12KB) and assign the remaining 20KB of the extra memory for Heap?
I have been able to change the scatter file and the .s file in order to change the memory map, but I don’t know what changes should be done.
My goal is to have a single ram with 48Kb but in the worst scenario I could work with segmented rams if the stack is not in the main one.
Based in the documentation, I tried to add a new ram and move the initial_stacker_pointer to an address in the new ram but I didn’t manage to understand what should be this new address. I believe this information is in the W7500P Reference Manual Version 1.0.3 ( Figure 5. Register & Memory Organization pg 43) but I didn’t understand it. Can some one please support me?
I have been able to change the scatter file and the .s file in order to change the memory map, but I don’t know what changes should be done.
My goal is to have a single ram with 48Kb but in the worst scenario I could work with segmented rams if the stack is not in the main one.
Based in the documentation, I tried to add a new ram and move the initial_stacker_pointer to an address in the new ram but I didn’t manage to understand what should be this new address. I believe this information is in the W7500P Reference Manual Version 1.0.3 ( Figure 5. Register & Memory Organization pg 43) but I didn’t understand it. Can some one please support me?[/quote]
Read reference manual section 7.4. But after reading, I think that the parameter 48 KB SRAM are crap. You can’t simple use this memory. The first problem is that the memory is separated from the main SRAM. So it could be used only for the heap and the limited use. But i not tried it.
I wanted to use TLS, but now I know that there is only 16 KB of SRAM, so it will not work. I wish they did next generation of this chip that will repair the problems (RTC and add main SRAM memory).
Lawrence, thank you for your answers,
Can you please give some more detailed explanations of reference manual Figure 5, section 7.4. What address should be used to access Socket 7 TX buffer for instance?
Thanks in advance!