Macro definition problem in W5500 library function

Dear all
I was confused when looking at the w5500 library function, as in the first picture, the w5500 Socket_n register corresponds to a 16-bit offset address. But in the actual library function, I see a 24-bit offset address as defined in the second diagram. Why add 08 at the end? And use the statement (ch<<5).Why not just define it as a 16-bit offset address according to the data manual? I will be very grateful if the Official technician will solve my confusion.


This must be preparation of the 3rd byte in the SPI transaction. 0x08 is the socket 0 register set. If you add channel (socket) number shifted left by 5 bits you will get 16-bit address + bank identification for respective channel (socket) ready to shift to the SPI. The only additionally needed is set bit for write and 2 bits for transfer mode type.

Thank you very much for solving my confusion with your answer.

Sorry,Eugeny,I just looked at the W5500 datasheet and Socket 0 Register corresponds to 0x01 and 0x08 corresponds to the Reserved field.Am I looking for the wrong register location?

You are looking into wrong place. Read the 2.2 of the datasheet, it will answer your question. 0x08 is bank (block) address of 0x01 shifted 3 bits left because lower 3 bits are occupied by other flags.

Thanks a lot Eugeny. Your answer clears up my confusion.