WIZnet Developer Forum

INTn pin is always high

First of all thank you for your attention:
I am using Freescale KL25z MCU as master and Wiznet w5500 chip as a slave for my project.

So far I have managed to send and recieve data via wiznet correctly. Thats why there is no problem writing and reading the w5500 chip.

In the next part I have to use interrupt pin in order to operate my system properly.
However, I cannot make the interrupt pin low.

For example when a Recieve signal comes, Sn0_IR becomes 0x05( Connect and Recieve int). Moreover the mask register Sn_IMR is FF. According to datasheet when these 2 registers becomes 1, the INTn pin is asserted to low.
By the way I wrote 100 to INTLEVEL register.
I also checked my system, when the int pin becomes low my system responses correctly. Furthermore there is always high signal seen by looking via scope.

Is there anything that I have missed?
I am waiting for your help
Thank you.

Hi~

I couldn’t look your question and I’m so sorry.
You confirm the SIR and SIMR register in common register.
If you use the Socket number ‘0’…
The SIR and SIMR set up a bit ‘0’ as high(1).
If you didn’t set bit ‘0’ in the SIR and SIMR, INTn Pin isn’t operate.

thanks
EK

HELLO I WANT W5500 REGISTER CONFIGURATION USING TCP/IP

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