Section 9.2.1 in the W7500 manual describes the addresses of the flash registers, but there are no details on the bit arrangement in FACCR, FACTRLR and FSTATR. Would it be possible to get this information?[/quote]
FEN and CTRL bits of FACCR are located at bits 16 and 17 (write 0x00030000 to set)
SER of FACTRLR seems to be at bit 27 (0x08000000)
1.What is the Use of Information block ,DATA 0 & DATA 1 In W7500P ???
2.What is the 0x1FFF1001 & 0x010)?? #define IAP_ENTRY (0x1FFF1001) // Because Thum code #define IAP_ERAS (0x010)
3. What is meant by Thum Code??
1.What is the Use of Information block ,DATA 0 & DATA 1 In W7500P ???
2.What is the 0x1FFF1001 & 0x010)?? #define IAP_ENTRY (0x1FFF1001) // Because Thum code #define IAP_ERAS (0x010)
3. What is meant by Thum Code??
There is no technical restrictions (as i know) about DATA0 and DATA1. You can use this pages for custom datas like configs, keys, … You can use other flash pages for same purpose but using DATAx pages reduce risk of erasing/modifying firmware (and use a better protecting strategy)
Where did you see “0x1FFF1001 & 0x010” (i have not the whole docs and code in mind)
About Thumb code
The W7500 chip contains an ARM cortex M0 cpu. This processor use by default 32 bits instructions set but may also support 16 bits instruction set called Thumb instructions. This reduce code size and improve performance in many cases.
Oh, i have badly understand your first question (i have read “&” as logic operator, not just as “and” )
The first value (0x1FFF1001) is the address of a small piece of code located into a reserved memory. This piece of code contains functions that can be used to update flash content (IAP). I don’t know if this is a ROM or a reserved flash page because the doc about this page is poor (this is not important if you just want to use it).
When you call this IAP code, you need to give arguments. One of them is a code that define the command you want to call (erase, write, …). The second value of your question (0x10) is one of this commands.
Hello! How can I learn a number of the bit of SER in the register FCTRLR, and also a number of the bits of SZ in the register FACCR and a number of the bits of WR and WRI in the register FCTRLR???
As i know, there is no detail about FCTRLR bits into any document. Wiznet recommands to use the embedded IAP functions, that works fine (with some limitations on clock speed). I don’t know really why they have not documented this registers.
In a previous post of this thread i have give position of some bits (like SER and FEN) found by disasembling IAP functions. At the end this is useless because you can’t initiate a flash erase/write from a code into flash (i will locks).