I have written drivers for the W5100 chip. I use the Sn_IR RECV bit to sense when new data has been received. For UDP packets, I read the packet length (offset 6 and 7 bytes from the packet start) and with that information I process the UDP packet. I then clear the Sn_IR RECV bit by writing ‘1’. I update the Sn_RX_RD value (incrementing by the packet length, plus the 8 bytes for the UDP packet header), and finally complete the receive operation by sending the RECV command (0x40) to Sn_CR.
For the W5100, if there is more received data (either new or that was already received when I checked the Sn_IR RECV bit) the Sn_IR RECV bit is again asserted (==‘1’) after the RECV command. In this way, I can reliably use the socket receive interrupt to sense data.
The datasheet for the W5200 suggests using the Sn_RX_RSR register to determine when data has been received. It specifically points to potential problems using Sn_IR RECV. Does the W5200 function differently than the W5100 in this way? Am I correct that if I do not process all received data, or if new data arrives during processing, after the RECV command is sent, Sn_IR RECV bit will again be set?