WIZnet Developer Forum

W5500 to MSP430

Hi,
I’m building a board based on the wiznet w5500 and an MSP430F5529LP. for now, I’m testing on a setup of a MSP430F5529LP launchPad and a wiznet kit w5500-EVB.
I’m running on code composer studio.
My questions as follows.
1- does wiznet provide some software librairies for MSP430 family?
2- I’m communicating with the wiznet using SPI, the pinout connections are:

MSP430F5529LP---------->>>>>>wiznet w55-EVB
CLK P3.2 >>>>>>>>> POI_6
MISO P3.1>>>>>>>>> POI_8
MOSI P3.0>>>>>>>>> POI_9
STE P2.7>>>>>>>>> POI_2

However, I don’t use the wiznet INT signal [pin 36] and don’t see its utilityin the design.
could you please clarify.
Thanks

Redouane,

Coincidentally, I’m using the same uC.

I had no real problems connecting the W5500 up.

I used the ioLibrary_Driver from githhub:
https://github.com/Wiznet/ioLibrary_Driver

I also used the USCI_B1 interface on the 5529 (as I had these pins available).
P4.1, 4.2, 4.3: SIMO, SOMI, CLK
You do not need to define the STE pin, unless you have a multi-master SPI bus. In my case, I’m using P4.0 (also could be used as STE) as the W5500 SPI chip-select pin in normal GPIO mode.
Reset of the W5500 is also controlled with another pin in GPIO mode (P3.7).

Here are my CS and Read/Write callbacks:

[code]// brief Call back function for WIZCHIP select.
void CB_Eth_ChipSelect(void)
{
//ensure all data has been sent (or received) before pulling the chip-select
while (USCI_B_SPI_isBusy(USCI_B1_BASE)){
;
}
GPIO_setOutputLowOnPin(nEth_CS_pin[PORTNUM], nEth_CS_pin[BITNUM]);
//then delay for at least 30 nS
__delay_cycles(2);
}

// brief Call back function for WIZCHIP deselect.
void CB_Eth_ChipDeselect(void)
{
//ensure all data has been sent (or received) before pulling the chip-select
while (USCI_B_SPI_isBusy(USCI_B1_BASE)){
;
}
//then delay for at least 30 nS
__delay_cycles(2);
GPIO_setOutputHighOnPin(nEth_CS_pin[PORTNUM], nEth_CS_pin[BITNUM]);
}

// brief Callback function to read byte usig SPI.
uint8_t CB_Eth_SPI_Read(void)
{
//return SPI1_Read(0xAA);
//Send dummy byte to Wizchip (activates SPI clock)
CB_Eth_SPI_Write(0x00);
while (USCI_B_SPI_isBusy(USCI_B1_BASE)){
;
}
//and return received data byte
return USCI_B_SPI_receiveData(USCI_B1_BASE);
}

// brief Callback function to write byte using SPI.
void CB_Eth_SPI_Write(uint8_t wb)
{
//SPI1_Write(wb);

//USCI_B1 TX buffer ready?
while(!USCI_B_SPI_getInterruptStatus(USCI_B1_BASE, USCI_B_SPI_TRANSMIT_INTERRUPT)) {
	;
}
//Transmit Data to slave
USCI_B_SPI_transmitData(USCI_B1_BASE, wb);
//ensure data is sent.

}[/code]

The one bit that took a few tries was setting the SPI config on the 5529 (using TI’s DriverLib). Especially clockPhase and clockPolarity:
[code]
// SPI Master Configuration Parameter
USCI_B_SPI_initMasterParam param = {0};

param.selectClockSource = USCI_B_SPI_CLOCKSOURCE_ACLK;
param.clockSourceFrequency = UCS_getACLK();
param.desiredSpiClock = 500000;	// max desired frequency.  If < ClockSource, then ClockSource
param.msbFirst = USCI_B_SPI_MSB_FIRST;
//param.clockPhase = USCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT;
param.clockPhase = USCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT;
param.clockPolarity = USCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW;
    // Configuring SPI in 3-wire master mode
    USCI_B_SPI_initMaster(USCI_B1_BASE, &param);

    //Enable SPI module
USCI_B_SPI_enable(USCI_B1_BASE);

// Enable USCI_B1 RX interrupt
USCI_B_SPI_clearInterrupt(USCI_B1_BASE, USCI_B_SPI_RECEIVE_INTERRUPT);
USCI_B_SPI_enableInterrupt(USCI_B1_BASE, USCI_B_SPI_RECEIVE_INTERRUPT);
[/code]

I’m currently running the assembly in SPI-polling mode (as in the socket.c example). I attempted using the INTn output pin on the W5500, however, it seems that a hardware interrupt is not generated when the connection is lost (after some quick testing). Maybe this is a problem for me, maybe not. However, I set it aside as I need to work on some other aspects of the circuit.

I’ve tested everything using a raw socket via Putty.

I hope the above helps.

-Chris


Hi chriskner,
Thank you for sharing.

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