layout question regarding the reference schematic

TCP/IP Chip W5500
1

Hello - I have a layout question regarding the reference schematic for W5500
http://wizwiki.net/wiki/lib/exe/fetch.php?media=wiznet_schematic:ethernet_chip:w5500_sch_v110_use_mag_.pdf
Its a shame no PCB layout is provided…

Should I locate R1 R2 R3 / R6 R7 - near(er) the W5500 chip or the RJ45 socket? Which side do they ‘terminate’?
Where is it best to put C9 C10 - near(er) the W5500 chip or the RJ45 socket?

I’ll locate R21 to R24 near the W5500 - i think that’s obvious.
Thanks…

2

You can look in here into layout guide for W5100. Principles for W5500 are the same.

In my experience, most critical are:

  • crystal placing;
  • GND planes;
  • trace routing (shape, closeness of + and -, their length)

Regarding block A and B: I examined several PCBs with other chips (Intel) and they have relatively long traces between chip and magnetics, A and B located somewhere in the center of pathway. Thus your task would be just keep + and - traces as short as possible, as close to each other as possible, as mirrored as possible, and place these resistors/caps in the most convenient place.

3

Thanks - i didn’t know about this document.

But very odd…
The schematic for the W5100 has C3 to GND
:whereas:
W5500 schematic connects TX+ TX- via 49.9R to 3V3A.

Mmm. Very different… I hope its not a mistake… I’ll stick with the W5500 schematic.
It does hint termination goes near the RJ45. It just feels a bit counter intuitive as the driver is located in the chip…
Thanks for your help - time spent here is better spent chasing corruption errors later on…
I think I’ve mostly nailed to points you highlight. This is just the polish…
My tracks are short - but its a template for other products that may not be so lucky…

4

You MUST stick to schematic of the chip you use, in this case W5500. That document contains design guidelines in general, which are good to implement to minimize design issues.