W5200 - Write/Read of registers and memory


Im using the W5200 in combination with a PIC24 and FreeRTOS. My source is based on the driver for the microchip librarys.

Im having some timing problems when writing and reading to registers and TX memory. E.g. in the code below the FreeTXSpace of the socket is read before and after writing data into the TX memory of the socket. Unless I put a delay between writing to TX memory and reading the remaining free space from Sn_TX_FSR, I get exactly the same value as before writing. The same happens with other registers (e.g. Sn_TX_WR), immediatly reading after writing returns the old value, only after a slight delay the new value can be read.

Are there some delays required after writing? If so, where are these specified?

[code] WORD wActualLen;
WORD wFreeTXSpace, wFreeTxSpaceAfterSend;


wFreeTXSpace = TCPIsPutReady(hTCP);

if(wFreeTXSpace == 0u)
   TCPFlush(hTCP);   // Send window update packet without any application data
   return 0;

wActualLen = wFreeTXSpace;

if(wFreeTXSpace > len)
  wActualLen = len;

prvTCPRAMCopy(hTCP, MyTCPStub.txHead, MyTCPStub.vMemoryMedium, (PTR_BASE)data, TCP_PIC_RAM, wActualLen);

MyTCPStub.txHead += wActualLen;

// Send these bytes right now if we are out of TX buffer space
if(wFreeTXSpace <= len)

vTaskDelay( 10 / portTICK_RATE_MS );             // WORKING FINE WITH THIS DELAY!

wFreeTxSpaceAfterSend = TCPIsPutReady(hTCP);
if( wFreeTxSpaceAfterSend != ( wFreeTxSpaceAfterSend - wActualLen ) )
    return 0;

return wActualLen;[/code]



I think you use SPI interface.

You should design with SPI read/write timing.

The timing is in datasheet chapter 6. External interface.

Best regards.


Hi hjjeon0608,

Thanks very much for your reply. Yes, im using the SPI interface, currently at 2MHz. I’m aware of the timings, at least the ones in chapter 7.4.3. Since these are all in the range of ns and my clock is only 2MHz these should be fine.

Below I’ve put three succeeding captures of my communication, they show the update of Sn_WR_TX and the SEND command, while reading SN_WR_TX before and after the SEND.

The first part of the following capture shows writing to the Sn_TX_WR register 0x4024. The value to be written is the new pointer location 0x9578. The second command is reading back the same register right after the write. As can be seen the value is not 0x9578, but 0x9532 which equals the value before the write.

This capture shows the SEND command and reading of the Sn_CR register (bit is already cleared at the time of read).

Right afterwards Sn_TX_WR is read again, now returning 0x9578 as written in the first capture.

Why can Sn_TX_WR not be read right after writing it? As far as I found out today this is not whats causing my problems, nevertheless it seems strange to me and could get me into trouble at another point if not taken into account.

Best regards.


Hi, NEC.

TX write pointer register is different a little bit.

The register is not updated until operating send or send_mac command.

So, when you read TX write pointer register after write value to TX write pointer register, you cannot read correct value.

Best regards.