I have been using w5300 with Xilinx Spartan 6 FPGA. I was able to write into its registers successfully (I can ping it. I set the MAC Address, IP address, Gateway address and Subnet mask. Using command line I can ping it (tx led blinks) and I receive reply from the specified IP Address). But I have problem reading from the registers. The problem is that when I analyze and monitor the data bus using Chipscope during the read operation, I can see the right value of register, but it is not stable and after a short time (around one or two nano seconds) it changes. this happens multiple times until the RD and CS is high.
Here is the timing description for read operation:
- I drive cs and rd low. at the same time I put the register address on address bus. rd and cs stay low for 50ns.
- I read the data bus.
- cs and rd stay low for another 50ns. address is not changed until cs and rd are high.
I have uploaded the waveform from chipscope. I am reading the value of Sn_SRR register for socket 0.
- List item
I really appreciate your help!