I want to enable the SPI1 of the LPC micro on the evaluation board to connect to FPGA on another board.
While readng the init code for w5500 I noticed that the reset is done thru PIO0_22:
Chip_GPIO_SetPinState(LPC_GPIO, 0, 22, false); // N_RESET tmp = 0xFF; while(tmp--); Chip_GPIO_SetPinState(LPC_GPIO, 0, 22, true); // N_RESET
On the other hand in the schematics (V1.0) the w5500 RST_N connected to LPC micro PIO0_3 pin?!
The problem also is that PIO0_ 22 is the only pin where I can select the MISO1 for the SPI1 interface.
Another issue I saw is that the SSEL0 signal for the SPI0 select is not done via he SSEL dedicated function but rather via a GPIO function of the same pin (PIO0_2/SSEL0):
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 2, (IOCON_FUNC0 | IOCON_MODE_PULLUP)); Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 2); // SSEL(CS) as GPIO output
Why it is done this way? Should I follow the same method when workng with SPI1 or is it somehow related to wiznet SPI interface.