according the specification (1.08 page 36) I understand, that HW interrupt are issued if the SIMR is a ‘1’ and a socket interrupt occurs. i.e. information flow is from socketregister to SIR. and the masked by SIMR; SIR can bet set even if SIMR is set to '0’
looking for the function of Sn_IR and Sn_IMR the functions seems to be inverted.
here we read: " …When an interrupt occurs and the corresponding bit of
Sn_IMR is ‘1’, the corresponding bit of Sn_IR becomes ‘1’…"
does the mean you will never see a Sn_IR bit if all Sn_IMR are set to ‘0’, or is this a confusion with the bit names in SIR register?
if I look to the code in “socket.c” it seem the spec is not correct in this explanation.
does anybody know how the rally works?