Hello. Sorry for my Englishin case I will make any mistake. I’m not a native speaker. I faced an issue using w5300 in UDP mode connected to FPGA. In FPGA simple loopback logic was implemented (send the same data which was received to the same socket). On a PC application was created where udp socket was opened and in infinite cycle send(…) and recv(…) were called sequentially. Code example:
…
char sd[128];
char recvBuff[128];
while(1)
{
int bs = sendto(m_Socket, sd 1, 0,(SOCKADDR *)&adr, sizeof(adr));
int rcv = recv(m_Socket, recvBuff, 1, 0);
}
Everything worked good and in WireShark and FPGA logic analizer I didn’t see any mistake. But accidentally I commeneted recv(…) function and started the application. PC began send huge amount of data to W5300. I saw my fault stopped the application, uncomment recv(…) function, and started application again but opened socket with another port. After this W5300 in all received packets returned previous port number of applacation socket (which was before port change in application). I see this both in FPGA logic analizer and WireShark. And if before I saw in WireShark that W5300 send to the same port from which data was received, than after such a “data bombarding” it returns “bombarding” port. Has any one faced such a problem?
If you did not perform purge of the receive buffers of the PC (closed that socket, rebooted PC) it will return all the packets it was able to capture while buffer had space for packet data.
Thanks for the answer.
I see that a new packet sends from PC from new socket reachs W5300 at the same time it was send (made a trigger in FPGA logic analyzer) and I see that PC sends from a new port but W5300 returns old port which W5300 was bombarded.
Please explain if you have solved the issue. It is not clear if you made any conclusion so far. If you still have troubles please attach wireshark logs and explain what and where you see the issue.
