W5500 SPI Bottleneck


#1

Hi!

I am aware that in using the W5500, the SPI is the major cause of bottleneck.

When doing IPerf using atmega328p chip on W5500. The SPI we use is about 8MHz. Now, we are expecting the results to be at least near 8Mbps with a few losses on start/stop events. But what we are getting is just ~3 Mbps.

Reading through the results of those who had done this activity, our results are comparable.

But I can’t explain why this is happening and I can’t find anything.

Hoping someone can explain this to us.


#2

it needs 8 clock for 1-byte send. W5500 SPI Frame consists of 16bits Offset Address in Address Phase, 8bits Control Phase and N bytes Data Phase. it needs at least 32 clock for a valid data.
image

Also, Network speed and SPI clock speed is different.
I think if network speed is 3Mbps, it is fast

thanks,
best regards,