Print bytes you put into the TX buffer onto the screen / diagnostic console - literally - when you put byte to the TX buffer also print it onto the screen. It may happen there’s something corrupting characters during data move (e.g. interrupt routine not saving accumulator). Then check packets from the W5500 to see what data is in packets.
If this problem is not completely deterministic, maybe the SPI frequency is too high? Because with an increased frequency, the probability for errors also increases; furthermore the data that is transmitted from the host MCU to the W5500 doesn not have a checksum. You could try reading back your TX data after writing it to the buffer and see if the data matches
I know that, but I can’t see where OP mentioned that he does not exceed that frequency. Furthermore the chip’s SPI isn’t necessarily the only thing that might have trouble with a high clock frequency; Depending on the host MCU or the layout, other issues might arise too.
When I get this sort of issue, I mostly try drastically lowering the frequency, to verify whether it is an issue.
I think, that fact that 0x0C = 0000 1100 and 0x1E = 0001 1110 and that he said
might support this idea, because it looks like something is skewed.
Did you try to implement a readback to see if the data makes it all the way to the chip?
Could you find any pattern as to under which circumstances this happens?
And out of curiousity: What was your frequency before and after, if I may ask?
Yes, I did. I verified data before updating S0_TX_WR pointer, and I found that occasionally few bytes of Tx data was loaded incorrectly when error occurred.
Not in pattern, but most of the time, error appeared to be coincidentally happened when the computer broadcast “Whohas”
I was running at 500Khz bit clock, and reduced to 50Khz…This does not help much - I think
There are a few more ICs (i.e. EEPROM, Encoder, and Switches) connected in the spi bus, but they should not be active because their CSx pins having pulled up resistors by default.
I’ve also seen that S0_SR having a few weird states such as 0x01, 0x02, 0x03 during disconnect and re-open the socket.
I drive the chip select pin (CS) low when communicate with the device, so I know for sure that others do not go low, except W5500 CS pin. Level had been verified too.
I was reading S0_TX_RD as my TX pointer. After carefully reading the data sheet, I changed my pointer by reading S0_TX_WR. everything is correct after that.
What is the different between S0_TX_RD and S0_TX_WR beside [R] and [R/W], and as well as S0_RX_RD and S0_RX_WR?
TX_FSR is being calculated basing on the difference between these two pointers. RD is internal pointer for the stack, WR is pointer for driver data load into TX buffer.