WIZ550S2E extra bits at receving at

tsao.ethan · July 24, 2019, 9:06pm

I have the WIZ550S2E serial-to-Ethernet converter chip. I’m having a little trouble with sending and receiving data. It seems to send just fine, but when receiving data from the Ethernet side of the chip, it seems to add several bits of data to the data packet.

For context, I have performed a loopback test to confirm that data is being sent correctly. I have set up a static IP and I have configured it using the Configuration Tool. I have also set up a virtual serial port using the WIZVSP.

Thoughts?

javakys · July 25, 2019, 1:18am

Hello,

Can you capture packet with Wireshark.exe?
If so, please give us the packet capture file.

It would be helpful for us to investigate what the cause is.

Thx.

James.

tsao.ethan · August 2, 2019, 5:41pm

WizConfig.zip (110.4 KB)

We have an FPGA on a board which should send data to the WIZ chip which we have connected to our laptop via ethernet. Attached is our configurations and the Wireshark capture. In the Wireshark capture, we were sending 5A5A5B5B5C5C, but there are leading zeros.

javakys · August 12, 2019, 6:26am

The captured packets look strange.
You didn’t use any Data Packing option and each ethernet packet must have a different bytes size.
But all ethernet packets have the same bytes, 12 bytes, except the last one.
And you said that you sent “5a5a5b5b5c5c” but there is no “5b5b5c5c”.

I’d like to ask you to measure the serial line between your FPGA and WIZ550S2E with oscilloscope.
Please make sure that your FPGA didn’t sent the data which is captured on the ethernet line over the serial line.

Thank you.
James.