W5500 returning data byte zero always


I am using the W5500 chip. But whenever I try to read (and I think also it’s happening with write), I get the “010203” bytes, but I always get the data byte as 0. Even though both MOSI and MISO are toggled at the falling edge of the CLK. Does anyone know why this might be happening?

The following is the scope of one SPI transfer, with OM=1 (FDM, 1Byte)

Reading the VERSIONR:

I think you are doing a write operation, not a read operation.


If you only want to read 1byte of version register, this value is 00 39 00 00.
Change the value and try again.

Hello Kim

Thanks for your reply.

In fact, this 01 byte corresponds to the Control byte, for which the 2 LSBs are the OM(VDM or FDM), and not the R/W bit. Anyway, I tried to do it with VDM (OM=0), and got the same result:

I still don’t have any interpretation.
I tried all R/Ws on all registers, FDM and VDM, and I never have any data. I’m not sure the chip is interpreting well my control.
Anyway, I noticed now that on the MISO line, at the end of a test, I see some flipping, that is not continuous, of a frequency of 25MHz, before the line settles from 0 to 1.

Also, in VDM, I’m seeing that the chip resends the 010203 bytes on MISO after each 4 data bytes. Does this signify

These screenshots show the toggling at the end of a test

The value mean a per-phase byte numbering and does not affect the system.

01 : Address phase(high -Address )
02 :Address phase( low - address)
03 : control phase
Isn’t the MISO line connected elsewhere?
It’s also hard for me to figure out what the cause…
I will try to fine the cause,too

I see, we suggested what you said.
I don’t know about the MISO, the W5500 is implemented on a board with other components.
We suggested it might be a clock issue, maybe caused by the external 25MHz clock, affecting the registers.
I stopped working on W5500 now and bought a W6100 and started working on it.
Thank you.

Does the same problem appear on the W6100?

No. W6100 is working perfectly, except that I can’t write on the MSSR, that’s the only register that’s unwritable, and I still don’t know why.

If you have any idea it would be great: