/********************************************************************************** File: wiznet.h Description: This file contains definition for wiznet module. Release History: Author Date Remarks Version Omer Miranda 15-01-2014 Created 1.0 ***********************************************************************************/ #ifndef __WIZNET_H #define __WIZNET_H /* *********************************************************************************** Include Files *********************************************************************************** */ #include /* *********************************************************************************** Macro Definitions *********************************************************************************** */ #define MAX_SOCK_NUM 4 /* Maxmium number of socket */ /* * Wiznet W5100 opcodes */ #define W5100_WRITE_OPCODE 0xF0 #define W5100_READ_OPCODE 0x0F //#define __DEF_IINCHIP_INT__ /**< involve interrupt service routine */ #define COMMON_BASE 0x0000 #define W5100_TXBUF_START_ADDRESS (COMMON_BASE + 0x4000) /* Internal Tx buffer address of the wiznet chip */ #define W5100_RXBUF_START_ADDRESS (COMMON_BASE + 0x6000) /* Internal Rx buffer address of the iinchip */ /* * Wiznet W5100 Common register addresses */ #define W5100_MR 0x0000 /* Mode Register */ #define W5100_GAR 0x0001 /* Gateway Address: 0x0001 to 0x0004 */ #define W5100_SUBR 0x0005 /* Subnet mask Address: 0x0005 to 0x0008 */ #define W5100_SHAR 0x0009 /* Source Hardware Address (MAC): 0x0009 to 0x000E */ #define W5100_SIPR 0x000F /* Source IP Address: 0x000F to 0x0012 */ #define W5100_IR 0x0015 /* Interrupt Register */ #define W5100_IMR 0x0016 /* Interrupt Mask Register */ #define W5100_RTR 0x0017 /* Retry Timeout Register: 0x0017 to 0x0018 */ #define W5100_RCR 0x0019 /* Retry Count Register */ #define W5100_RMSR 0x001A /* RX Memory Size Register */ #define W5100_TMSR 0x001B /* TX Memory Size Register */ #define W5100_PATR 0x001C /* PPPoE Authentication-Type Register: 0x001C to 0x001D */ #define W5100_PTIMER 0x0028 /* PPP Link Control Protocol Request Timer Register */ #define W5100_PMAGIC 0x0029 /* PPP Link Control Protocol Magic number Register */ #define W5100_UIPR 0x002A /* Unreachable IP Address Register: 0x002A to 0x002D */ #define W5100_UPORT 0x002E /* Unreachable Port Register: 0x002E to 0x002F */ /* * Wiznet 5100 Socket registers * Starts from 0x0400 (Socket 0), 0x0500 (SOcket 1), 0x0600 (Socket 2) and 0x0700 (Socket 3) */ #define CH_BASE (COMMON_BASE + 0x0400) #define CH_SIZE 0x0100 /* Size of each channel register map */ #define Sn_MR(ch) (CH_BASE + ch * CH_SIZE + 0x0000) /* Socket n Mode register */ #define Sn_CR(ch) (CH_BASE + ch * CH_SIZE + 0x0001) /* channel n Command register */ #define Sn_IR(ch) (CH_BASE + ch * CH_SIZE + 0x0002) /* channel n Interrupt register */ #define Sn_SR(ch) (CH_BASE + ch * CH_SIZE + 0x0003) /* channel n Status register */ #define Sn_PORT0(ch) (CH_BASE + ch * CH_SIZE + 0x0004) /* channel n Port register */ #define Sn_DHAR0(ch) (CH_BASE + ch * CH_SIZE + 0x0006) /* channel n Destination hardware address register */ #define Sn_DIPR0(ch) (CH_BASE + ch * CH_SIZE + 0x000C) /* channel n Destination IP address register */ #define Sn_DPORT0(ch) (CH_BASE + ch * CH_SIZE + 0x0010) /* channel n Destination Port register */ #define Sn_MSSR0(ch) (CH_BASE + ch * CH_SIZE + 0x0012) /* channel n Maximum Segment Size register */ //#define Sn_PROTO(ch) (CH_BASE + ch * CH_SIZE + 0x0014) /* channel n Protocol of IP Header field in IP raw mode register */ #define Sn_TOS(ch) (CH_BASE + ch * CH_SIZE + 0x0015) /* channel n Type of Service(TOS) register */ #define Sn_TTL(ch) (CH_BASE + ch * CH_SIZE + 0x0016) /* channel n Time to live(TTL) register */ #define Sn_TX_FSR0(ch) (CH_BASE + ch * CH_SIZE + 0x0020) /* channel n Transmit free memory size register */ #define Sn_TX_RD0(ch) (CH_BASE + ch * CH_SIZE + 0x0022) /* channel n Transmit memory read pointer register */ #define Sn_TX_WR0(ch) (CH_BASE + ch * CH_SIZE + 0x0024) /* channel n Transmit memory write pointer register */ #define Sn_RX_RSR0(ch) (CH_BASE + ch * CH_SIZE + 0x0026) /* channel n Received data size register */ #define Sn_RX_RD0(ch) (CH_BASE + ch * CH_SIZE + 0x0028) /* channel n Receive memory Read pointer register */ #define Sn_RX_WR0(ch) (CH_BASE + ch * CH_SIZE + 0x002A) /* channel n Receive memory Write pointer register */ /* MODE register values */ #define MR_RST 0x80 /* reset */ #define MR_PB 0x10 /* ping block */ #define MR_PPPOE 0x08 /* enable pppoe */ #define MR_LB 0x04 /* little or big endian selector in indirect mode */ #define MR_AI 0x02 /* auto-increment in indirect mode */ #define MR_IND 0x01 /* enable indirect mode */ /* IR register values */ #define IR_CONFLICT 0x80 /* check ip confict */ #define IR_UNREACH 0x40 /* get the destination unreachable message in UDP sending */ #define IR_PPPoE 0x20 /* get the PPPoE close message */ #define IR_SOCK(ch) (0x01 << ch) /* check socket interrupt */ /* Sn_MR values */ #define Sn_MR_CLOSE 0x00 /* unused socket */ #define Sn_MR_TCP 0x01 /* TCP */ #define Sn_MR_UDP 0x02 /* UDP */ #define Sn_MR_IPRAW 0x03 /* IP LAYER RAW SOCK */ #define Sn_MR_MACRAW 0x04 /* MAC LAYER RAW SOCK */ #define Sn_MR_PPPOE 0x05 /* PPPoE */ #define Sn_MR_ND 0x20 /* No Delayed Ack(TCP) flag */ #define Sn_MR_MULTI 0x80 /* support multicating */ /* Sn_CR values */ #define Sn_CR_OPEN 0x01 /* initialize or open socket */ #define Sn_CR_LISTEN 0x02 /* wait connection request in tcp mode(Server mode) */ #define Sn_CR_CONNECT 0x04 /* send connection request in tcp mode(Client mode) */ #define Sn_CR_DISCON 0x08 /* send closing reqeuset in tcp mode */ #define Sn_CR_CLOSE 0x10 /* close socket */ #define Sn_CR_SEND 0x20 /* updata txbuf pointer, send data */ #define Sn_CR_SEND_MAC 0x21 /* send data with MAC address, so without ARP process */ #define Sn_CR_SEND_KEEP 0x22 /* send keep alive message */ #define Sn_CR_RECV 0x40 /* update rxbuf pointer, recv data */ /* Sn_IR values */ //#ifdef __DEF_IINCHIP_PPP__ // #define Sn_IR_PRECV 0x80 // #define Sn_IR_PFAIL 0x40 // #define Sn_IR_PNEXT 0x20 //#endif #define Sn_IR_SEND_OK 0x10 /* complete sending */ #define Sn_IR_TIMEOUT 0x08 /* assert timeout */ #define Sn_IR_RECV 0x04 /* receiving data */ #define Sn_IR_DISCON 0x02 /* closed socket */ #define Sn_IR_CON 0x01 /* established connection */ /* Sn_SR values */ #define SOCK_CLOSED 0x00 /* closed */ #define SOCK_INIT 0x13 /* init state */ #define SOCK_LISTEN 0x14 /* listen state */ #define SOCK_SYNSENT 0x15 /* connection state */ #define SOCK_SYNRECV 0x16 /* connection state */ #define SOCK_ESTABLISHED 0x17 /* success to connect */ #define SOCK_FIN_WAIT 0x18 /* closing state */ #define SOCK_CLOSING 0x1A /* closing state */ #define SOCK_TIME_WAIT 0x1B /* closing state */ #define SOCK_CLOSE_WAIT 0x1C /* closing state */ #define SOCK_LAST_ACK 0x1D /* closing state */ #define SOCK_UDP 0x22 /* udp socket */ #define SOCK_IPRAW 0x32 /* ip raw mode socket */ #define SOCK_MACRAW 0x42 /* mac raw mode socket */ #define SOCK_PPPOE 0x5F /* pppoe socket */ /* *********************************************************************************** Structures definitions *********************************************************************************** */ typedef uint8_t SOCKET; /* *********************************************************************************** Public functions *********************************************************************************** */ void SysInit(uint8_t ucharTx_Size, uint8_t ucharRx_Size); // setting tx/rx buf size uint32_t initWiznet(void); uint8_t read_wiznet_reg(uint16_t addr); uint8_t write_wiznet_reg(uint16_t addr, uint8_t data); uint16_t wiz_read_buf(uint16_t ushAddr, uint8_t* ucharBuf,uint16_t ushLen); uint16_t wiz_write_buf(uint16_t ushAddr,uint8_t* ucharBuf,uint16_t ushLen); void send_data_processing(SOCKET s, uint8_t *ucharDataBuf, uint16_t ushLen); void write_data(SOCKET s, volatile uint8_t* p_ucharSrc, volatile uint16_t ushTxBufAddr, uint16_t ushLen); void recv_data_processing(SOCKET s, uint8_t* ucharDataBuf, uint16_t ushLen); void read_data(SOCKET s, volatile uint16_t ushRxBufAddr, volatile uint8_t* p_ucharDst, uint16_t ushLen); void setMR(uint8_t ucharVal); void setRTR(uint16_t ushTimeout); // set retry duration for data transmission, connection, closing ... void setRCR(uint8_t ucharRetry); // set retry count (above the value, assert timeout interrupt) void setIMR(uint8_t ucharMask); // set interrupt mask. uint8_t getIR( void ); void setGAR(void); // set gateway address void getGAR(uint8_t* p_ucharAddr); void setSUBR(void); // set subnet mask address void getSUBR(uint8_t* p_ucharAddr); void clearSUBR(void); void setSHAR(void); // set local MAC address void getSHAR(uint8_t* p_ucharAddr); void setSIPR(void); // set local IP address void getSIPR(uint8_t* p_ucharAddr); void setTMSR(uint8_t TxSize); void setRMSR(uint8_t RxSize); void setSn_MSS(SOCKET s, uint16_t ushSn_MSSR0); // set maximum segment size uint8_t getSn_IR(SOCKET s); // get socket interrupt status uint8_t getSn_SR(SOCKET s); // get socket status uint16_t getSn_TX_FSR(SOCKET s); // get socket TX free buf size uint16_t getSn_RX_RSR(SOCKET s); // get socket RX recv buf size void setSn_DHAR(SOCKET s, uint8_t* p_ucharAddr); void getSn_DHAR(SOCKET s, uint8_t* p_ucharAddr); void setSn_DIPR(SOCKET s, uint8_t* p_ucharAddr); void getSn_DIPR(SOCKET s, uint8_t* p_ucharAddr); void setSn_DPORT(SOCKET s, uint8_t* p_ucharAddr); void getSn_DPORT(SOCKET s, uint8_t* p_ucharAddr); void setSn_TTL(SOCKET s, uint8_t ucharTTL); uint16_t getW5100_RxMAX(uint8_t s); uint16_t getW5100_TxMAX(uint8_t s); uint16_t getW5100_RxMASK(uint8_t s); uint16_t getW5100_TxMASK(uint8_t s); uint16_t getW5100_RxBASE(uint8_t s); uint16_t getW5100_TxBASE(uint8_t s); uint8_t getISR(uint8_t s); void putISR(uint8_t s, uint8_t ucharVal); void processWiznetISR(void); #endif