#define MAJOR_VERSION 0x01 #define MINOR_VERSION 0x05 #define TRUE 1 #define FALSE 0 #define On 1 #define Off 0 #define SERVER 1 #define CLIENT 0 //ICD TYPE #define REQUEST 0x00 #define RESPONSE 0x01 #define INDICATION 0x02 //ICD COMMAND #define CMD_BAND_SELECT 0x00 #define CMD_THRU_AMP_SELECT 0x01 #define CMD_DIREC_ANTENA_DIR_SET 0x02 #define CMD_VUHF_BRF 0x03 #define CMD_UHF_OMNI_DRIEC_POL 0x04 //수직편파 UHF #5, 수평편파 UHF #6 #define CMD_BIT_REQUEST 0x05 #define CMD_BIT_SOURCE_SET 0x06 #define CMD_HF_BIT_OUT 0x07 #define CMD_VUHF_BIT_OUT 0x08 #define CMD_UHF_BIT_OUT 0x09 #define CMD_RSSI_REQUEST 0x0A #define CMD_RSSI_REPEAT_TIME 0x0B #define CMD_PGM_VERSION 0x0C #define CMD_PATH_STATUS 0x0D #define CMD_RFUNIT_CTRL 0x0E //RESERVED #define CMD_REAL_CHECK_RSSI 0x0F //140616 //ICD DATA #define PASS 0x00 #define FAIL 0x01 #define BAND_HF 0x00 //공용 #define BAND_VUHF 0x01 //공용 #define BAND_UHF 0x02 //공용 #define MODULE_NO1_DIREC_PATH 0x00 #define MODULE_ALL_DIREC_PATH 0x01 #define MODULE_ALL_OMNI_PATH 0x02 #define ANTENA_DIREC 0x00 //공용 #define ANTENA_OMNI 0x01 //공용 #define DIREC_ANTENA_VUHF 0x00 #define DIREC_ANTENA_UHF 0x01 #define ANTENNA_ANGLE_120 0x00 #define ANTENNA_ANGLE_240 0x01 #define ANTENNA_ANGLE_360 0x02 #define AMP_MODE_THRU 0x00 #define AMP_MODE_20dB 0x01 #define AMP_MODE_10dB 0x02 #define BRF_MODE_THRU 0x00 #define BRF_MODE_DMB 0x01 #define BRF_MODE_FM 0x02 #define POL_VER 0x00 #define POL_HORI 0x01 #define BIT_THRU 0x00 #define BIT_AMP 0x01 #define BIT_SOURCE_TCXO 0x00 #define BIT_SOURCE_EXT 0x01 #define BIT_HF_MODULE1 0x00 #define BIT_HF_MODULE2 0x01 #define BIT_HF_MODULE3 0x02 #define BIT_HF_MODULE4 0x03 #define BIT_HF_MODULE5 0x04 #define BIT_HF_INTERNAL 0x05 #define BIT_HF_THRU 0x00 #define BIT_HF_AMP 0x01 #define BIT_VUHF_MODULE1 0x00 #define BIT_VUHF_MODULE2 0x01 #define BIT_VUHF_MODULE3 0x02 #define BIT_VUHF_MODULE4 0x03 #define BIT_VUHF_MODULE5 0x04 #define BIT_VUHF_MODULE6 0x05 #define BIT_VUHF_MODULE7 0x06 #define BIT_VUHF_MODULE8 0x07 #define BIT_VUHF_MODULE9 0x08 #define BIT_VUHF_MODULE10 0x09 #define BIT_VUHF_MODULE11 0x0A #define BIT_VUHF_MODULE12 0x0B #define BIT_VUHF_INTERNAL 0x0C #define BIT_VUHF_THRU 0x00 #define BIT_VUHF_AMP 0x01 #define BIT_UHF_THRU 0x00 #define BIT_UHF_AMP 0x01 #define BIT_UHF_MODULE1 0x00 #define BIT_UHF_MODULE2 0x01 #define RSSI_HF_DIREC 0x00 #define RSSI_HF_OMNI 0x01 #define RSSI_VUHF_DIREC 0x02 #define RSSI_VUHF_OMNI 0x03 #define RSSI_UHF_DIREC 0x04 #define RSSI_UHF_OMNI 0x05 #define RSSI_HF 0x00 #define RSSI_VUHF 0x01 #define RSSI_UHF 0x02 #define RSSI_DIREC 0x00 #define RSSI_OMNI 0x01 #define RF_UNIT_MUSUN 0x00 #define RF_UNIT_JUNPA 0x01 //ICD - BIT ERROR CHECK #define BIT_STATUS_HMC380 0x01 #define BIT_STATUS_CURRENT_HF1 0x02 #define BIT_STATUS_CURRENT_HF2 0x04 #define BIT_STATUS_CURRENT_VUHF 0x08 #define BIT_STATUS_CURRENT_UHF1 0x10 #define BIT_STATUS_CURRENT_UHF2 0x20 #define BIT_STATUS_RF_DETECT_HF0 0x01 //0x40 #define BIT_STATUS_RF_DETECT_HF1 0x02 //0x80 #define BIT_STATUS_RF_DETECT_HF2 0x04 //0x100 #define BIT_STATUS_RF_DETECT_HF3 0x08 //0x200 #define BIT_STATUS_RF_DETECT_HF4 0x10 //0x400 #define BIT_STATUS_RF_DETECT_VUHF_MB0 0x20 //0x800 #define BIT_STATUS_RF_DETECT_VUHF_MB1 0x40 //0x1000 #define BIT_STATUS_RF_DETECT_VUHF_MB2 0x80 //0x2000 #define BIT_STATUS_RF_DETECT_VUHF_MB3 0x100 //0x4000 #define BIT_STATUS_RF_DETECT_VUHF_MB4 0x200 //0x8000 #define BIT_STATUS_RF_DETECT_VUHF_MB5 0x400 //0x10000 #define BIT_STATUS_RF_DETECT_VUHF_MB6 0x800 //0x20000 #define BIT_STATUS_RF_DETECT_VUHF_MB7 0x1000 //0x40000 #define BIT_STATUS_RF_DETECT_VUHF_MB8 0x2000 //0x80000 #define BIT_STATUS_RF_DETECT_VUHF_MB9 0x4000 //0x100000 #define BIT_STATUS_RF_DETECT_VUHF_MB10 0x8000 //0x200000 #define BIT_STATUS_RF_DETECT_VUHF_MB11 0x10000 //0x400000 #define BIT_STATUS_RF_DETECT_VUHF_MB12A 0x20000 //0x800000 #define BIT_STATUS_RF_DETECT_VUHF_MB13A 0x40000 //0x1000000 #define BIT_STATUS_RF_DETECT_VUHF_MB12B 0x20000 //0x800000 #define BIT_STATUS_RF_DETECT_VUHF_MB13B 0x40000 //0x1000000 #define BIT_STATUS_RF_DETECT_UHF1A 0x20000 #define BIT_STATUS_RF_DETECT_UHF2A 0x40000 #define BIT_STATUS_RF_DETECT_UHF1B 0x20000 #define BIT_STATUS_RF_DETECT_UHF2B 0x40000 //ICD - PLL #define PLL_Locked 0x02 //SCI extern Uint16 flagRxDataHeader; extern Uint16 flagRxDataFrtHead; extern Uint16 flagRxDataSndHead; extern Uint16 flagRxDataTrdHead; extern Uint16 flagRxRcmd; extern Uint16 flagRxDataLengthHigh; extern Uint16 flagRxDataLengthLow; extern Uint16 flagRxData; //extern Uint16 ReciveData[32]; //SCI Command #define CONTROLIOMA 0x20 #define CONTROLIOMB 0x21 #define STATUSREQ 0x50 //Alarm - UI #define BIT_ALARM_CURRENT_DETECT0 0x01 #define BIT_ALARM_CURRENT_DETECT1 0x02 #define BIT_ALARM_CURRENT_DETECT2 0x04 #define BIT_ALARM_CURRENT_DETECT3 0x08 #define BIT_ALARM_CURRENT_DETECT4 0x10 #define BIT_ALARM_RF_DETECT_HF0 0x01 #define BIT_ALARM_RF_DETECT_HF1 0x02 #define BIT_ALARM_RF_DETECT_HF2 0x04 #define BIT_ALARM_RF_DETECT_HF3 0x08 #define BIT_ALARM_RF_DETECT_HF4 0x10 #define BIT_ALARM_RF_DETECT_VUHF_MB0 0x01 #define BIT_ALARM_RF_DETECT_VUHF_MB1 0x02 #define BIT_ALARM_RF_DETECT_VUHF_MB2 0x04 #define BIT_ALARM_RF_DETECT_VUHF_MB3 0x08 #define BIT_ALARM_RF_DETECT_VUHF_MB4 0x10 #define BIT_ALARM_RF_DETECT_VUHF_MB5 0x20 #define BIT_ALARM_RF_DETECT_VUHF_MB6 0x40 #define BIT_ALARM_RF_DETECT_VUHF_MB7 0x80 #define BIT_ALARM_RF_DETECT_VUHF_MB8 0x100 #define BIT_ALARM_RF_DETECT_VUHF_MB9 0x200 #define BIT_ALARM_RF_DETECT_VUHF_MB10 0x400 #define BIT_ALARM_RF_DETECT_VUHF_MB11 0x800 #define BIT_ALARM_RF_DETECT_VUHF_MB12A 0x1000 #define BIT_ALARM_RF_DETECT_VUHF_MB13A 0x2000 #define BIT_ALARM_RF_DETECT_VUHF_MB12B 0x4000 #define BIT_ALARM_RF_DETECT_VUHF_MB13B 0x8000 #define BIT_ALARM_RF_DETECT_UHF1A 0x01 #define BIT_ALARM_RF_DETECT_UHF2A 0x02 #define BIT_ALARM_RF_DETECT_UHF1B 0x04 //reserved #define BIT_ALARM_RF_DETECT_UHF2B 0x08 //reserved //Ext Input #define raDspSwitch 0x00 //Rf Detect - H Active, Current Detect - L Active #define raBitRfDetect0 0x01 //HF0 - SENSOR0 #define raBitRfDetect1 0x02 //HF1 - SENSOR1 #define raBitRfDetect2 0x04 //HF2 - SENSOR4 #define raBitRfDetect3 0x08 //HF3 - SENSOR3 #define raBitRfDetect4 0x10 //HF4 - SENSOR4 #define raBitRfDetect5 0x20 //VUHF0 - SENSOR5 #define raBitRfDetect6 0x40 //VUHF1 - SENSOR6 #define raBitRfDetect7 0x80 //VUHF2 - SENSOR7 #define raBitRfDetect8 0x100 //VUHF3 - SENSOR8 #define raBitRfDetect9 0x200 //VUHF4 - SENSOR9 #define raBitRfDetect10 0x400 //VUHF5 - SENSOR10 #define raBitRfDetect11 0x800 //VUHF6 - SENSOR11 #define raBitRfDetect12 0x1000 //VUHF7 - SENSOR12 #define raBitRfDetect13 0x2000 //VUHF8 - SENSOR13 #define raBitRfDetect14 0x4000 //VUHF9 - SENSOR14 #define raBitRfDetect15 0x8000 //VUHF10 - SENSOR15 #define rbDspSwitch 0x01 #define rbBitRfDetect0 0x01 //VUHF11 - SENSOR16 #define rbBitRfDetect1 0x02 //VUHF12 - SENSOR17 #define rbBitRfDetect2 0x04 //VUHF13 - SENSOR18 #define rbCurDetect0 0x08 //HF0 - SENSOR19 #define rbCurDetect1 0x10 //HF1 - SENSOR20 #define rbCurDetect2 0x20 //VUHF0 - SENSOR21 #define rbCurDetect3 0x40 //VUHF1 - SENSOR22 #define rbCurDetect4 0x80 //UHF0 - SENSOR23 #define rbBitRfDetect3 0x100 #define rbBitRfDetect4 0x200 #define waDspRelay 0x00 #define wbDspRelay 0x01 #define wcDspRelay 0x02 #define wdDspRelay 0x03 #define weDspRelay 0x04 #define wfDspRelay 0x05 #define wgDspRelay 0x06 #define HF_SW1 0x01 #define HF_SW2 0x02 #define HF_SW3 0x04 #define HF_SW4 0x08 #define HF_SW5 0x10 #define HF_SW6 0x20 #define HF_SW7 0x40 #define HF_SW8 0x80 #define HF_SW9 0x100 #define HF_SW10 0x200 #define HF_SW11 0x400 #define HF_SW12 0x800 #define HF_SW13 0x1000 #define HF_SW14 0x2000 #define HF_SW15A 0x4000 #define HF_SW15B 0x8000 #define HF_SW15C 0x01 #define VUHF_SW1 0x01 #define VUHF_SW2 0x02 #define VUHF_SW3 0x04 #define VUHF_SW4A 0x08 #define VUHF_SW4B 0x10 #define VUHF_SW5A 0x20 #define VUHF_SW5B 0x40 #define VUHF_SW6 0x80 #define VUHF_SW7 0x100 #define VUHF_SW8 0x200 #define VUHF_SW9A 0x400 #define VUHF_SW9B 0x800 #define VUHF_SW10A 0x1000 #define VUHF_SW10B 0x2000 #define VUHF_SW11A 0x4000 #define VUHF_SW11B 0x8000 #define VUHF_SW12A 0x01 #define VUHF_SW12B 0x02 #define UHF_SW1 0x01 #define UHF_SW2 0x02 #define UHF_SW3A 0x04 #define UHF_SW4 0x08 #define UHF_SW5 0x10 #define UHF_SW6 0x20 #define UHF_SW7 0x40 #define UHF_SW8A 0x80 #define UHF_SW9 0x100 #define UHF_SW10 0x200 #define VUHF_MB_TSW1 0x01 #define VUHF_MB_TSW2 0x02 #define VUHF_MB_TSW3 0x04 #define VUHF_MB_TSW4 0x08 #define VUHF_MB_TSW5 0x10 #define VUHF_MB_TSW6 0x20 #define VUHF_MB_TSW7 0x40 #define VUHF_MB_TSW8 0x80 #define VUHF_MB_TSW9 0x100 #define VUHF_MB_TSW10 0x200 #define VUHF_MB_TSW11 0x400 #define VUHF_MB_TSW12 0x800 #define VUHF_MB_TSW13 0x1000 #define VUHF_MB_TSW14 0x2000 #define VUHF_MB_TSW15 0x4000 #define VUHF_MB_TSW16 0x8000 #define VUHF_MB_TSW17 0x01 #define VUHF_MB_TSW18 0x02 #define TX_DATA_SIZE 0x20 #define RX_DATA_SIZE 0x20 #define DSP_ADC_BUFFER 0x20 #define SCIA_TX_START { SciaRegs.SCICTL2.bit.TXINTENA = 1; \ PieCtrlRegs.PIEIFR9.bit.INTx2 = 1; \ } #define SCIA_TX_STOP ScibRegs.SCICTL2.bit.TXINTENA = 0 //==============================================SRAM #define aaaa 0xffff /*================================================================*/ /*======================== DSP OUTPUT SET ========================*/ /*================================================================*/ #define SMPS_ON GpioDataRegs.GPASET.bit.GPIO1=1; //DSPIO 0 #define SMPS_OFF GpioDataRegs.GPACLEAR.bit.GPIO1=1; #define VUHF_MB_TSW19_ON GpioDataRegs.GPASET.bit.GPIO2=1; //DSPIO 1 #define VUHF_MB_TSW19_OFF GpioDataRegs.GPACLEAR.bit.GPIO2=1; #define VUHF_MB_TSW20_ON GpioDataRegs.GPASET.bit.GPIO3=1; //DSPIO 2 #define VUHF_MB_TSW20_OFF GpioDataRegs.GPACLEAR.bit.GPIO3=1; #define VUHF_MB_BSW1_ON GpioDataRegs.GPASET.bit.GPIO4=1; //DSPIO 3 #define VUHF_MB_BSW1_OFF GpioDataRegs.GPACLEAR.bit.GPIO4=1; #define VUHF_MB_BSW2_ON GpioDataRegs.GPASET.bit.GPIO5=1; //DSPIO 4 #define VUHF_MB_BSW2_OFF GpioDataRegs.GPACLEAR.bit.GPIO5=1; #define VUHF_MB_BSW3_ON GpioDataRegs.GPASET.bit.GPIO6=1; //DSPIO 5 #define VUHF_MB_BSW3_OFF GpioDataRegs.GPACLEAR.bit.GPIO6=1; #define VUHF_MB_BSW4_ON GpioDataRegs.GPASET.bit.GPIO7=1; //DSPIO 6 #define VUHF_MB_BSW4_OFF GpioDataRegs.GPACLEAR.bit.GPIO7=1; #define VUHF_MB_BSW56_ON GpioDataRegs.GPASET.bit.GPIO12=1; //DSPIO 7 #define VUHF_MB_BSW56_OFF GpioDataRegs.GPACLEAR.bit.GPIO12=1; #define VUHF_MB_BSW7_ON GpioDataRegs.GPASET.bit.GPIO13=1; //DSPIO 8 #define VUHF_MB_BSW7_OFF GpioDataRegs.GPACLEAR.bit.GPIO13=1; #define VUHF_MB_BSW8_ON GpioDataRegs.GPASET.bit.GPIO14=1; //DSPIO 9 #define VUHF_MB_BSW8_OFF GpioDataRegs.GPACLEAR.bit.GPIO14=1; #define VUHF_MB_BSW9A_ON GpioDataRegs.GPASET.bit.GPIO15=1; //DSPIO 10 #define VUHF_MB_BSW9A_OFF GpioDataRegs.GPACLEAR.bit.GPIO15=1; #define VUHF_MB_BSW9B_ON GpioDataRegs.GPASET.bit.GPIO16=1; //DSPIO 11 #define VUHF_MB_BSW9B_OFF GpioDataRegs.GPACLEAR.bit.GPIO16=1; #define VUHF_MB_BSW10A_ON GpioDataRegs.GPASET.bit.GPIO17=1; //DSPIO 12 #define VUHF_MB_BSW10A_OFF GpioDataRegs.GPACLEAR.bit.GPIO17=1; #define VUHF_MB_BSW10B_ON GpioDataRegs.GPASET.bit.GPIO18=1; //DSPIO 13 #define VUHF_MB_BSW10B_OFF GpioDataRegs.GPACLEAR.bit.GPIO18=1; #define VUHF_MB_BSW11_ON GpioDataRegs.GPASET.bit.GPIO19=1; //DSPIO 14 #define VUHF_MB_BSW11_OFF GpioDataRegs.GPACLEAR.bit.GPIO19=1; #define VUHF_MB_BSW12A_ON GpioDataRegs.GPASET.bit.GPIO20=1; //DSPIO 15 #define VUHF_MB_BSW12A_OFF GpioDataRegs.GPACLEAR.bit.GPIO20=1; #define VUHF_MB_BSW12B_ON GpioDataRegs.GPASET.bit.GPIO21=1; //DSPIO 16 #define VUHF_MB_BSW12B_OFF GpioDataRegs.GPACLEAR.bit.GPIO21=1; #define VUHF_MB_BSW12C_ON GpioDataRegs.GPASET.bit.GPIO22=1; //DSPIO 17 #define VUHF_MB_BSW12C_OFF GpioDataRegs.GPACLEAR.bit.GPIO22=1; #define VUHF_MB_BSW13A_ON GpioDataRegs.GPASET.bit.GPIO23=1; //DSPIO 18 #define VUHF_MB_BSW13A_OFF GpioDataRegs.GPACLEAR.bit.GPIO23=1; #define VUHF_MB_BSW13B_ON GpioDataRegs.GPASET.bit.GPIO24=1; //DSPIO 19 #define VUHF_MB_BSW13B_OFF GpioDataRegs.GPACLEAR.bit.GPIO24=1; #define VUHF_MB_BSW13C_ON GpioDataRegs.GPASET.bit.GPIO25=1; //DSPIO 20 #define VUHF_MB_BSW13C_OFF GpioDataRegs.GPACLEAR.bit.GPIO25=1; #define PLL_CEN_ON GpioDataRegs.GPASET.bit.GPIO26=1; //DSPIO 21 #define PLL_CEN_OFF GpioDataRegs.GPACLEAR.bit.GPIO26=1; #define POWER_LED_ON GpioDataRegs.GPASET.bit.GPIO27=1; //DSPIO 22 #define POWER_LED_OFF GpioDataRegs.GPACLEAR.bit.GPIO27=1; #define ACC_ALARM_LED_ON GpioDataRegs.GPBSET.bit.GPIO48=1; //DSPIO 23 #define ACC_ALARM_LED_OFF GpioDataRegs.GPBCLEAR.bit.GPIO48=1; #define BIT_ALARM_LED_ON GpioDataRegs.GPBSET.bit.GPIO49=1; //DSPIO 24 #define BIT_ALARM_LED_OFF GpioDataRegs.GPBCLEAR.bit.GPIO49=1; #define ACC_NORMAL_LED_ON GpioDataRegs.GPBSET.bit.GPIO50=1; //DSPIO 25 #define ACC_NORMAL_LED_OFF GpioDataRegs.GPBCLEAR.bit.GPIO50=1; #define BIT_NORMAL_LED_ON GpioDataRegs.GPBSET.bit.GPIO51=1; //DSPIO 26 #define BIT_NORMAL_LED_OFF GpioDataRegs.GPBCLEAR.bit.GPIO51=1; //------------------------------------------------------------------//DSPIO 27 LAN_INT GPIO52 #define UHF_SW3B_ON GpioDataRegs.GPBSET.bit.GPIO53=1; //DSPIO 28 #define UHF_SW3B_OFF GpioDataRegs.GPBCLEAR.bit.GPIO53=1; //------------------------------------------------------------------//DSPIO 29 SPISIMO GPIO54 #define UHF_SW8B_ON GpioDataRegs.GPBSET.bit.GPIO58=1; //DSPIO 30 #define UHF_SW8B_OFF GpioDataRegs.GPBCLEAR.bit.GPIO58=1; #define HF_SPI_LE_HIGH GpioDataRegs.GPBSET.bit.GPIO59=1; //DSPIO 31 #define HF_SPI_LE_LOW GpioDataRegs.GPBCLEAR.bit.GPIO59=1; #define HF_SPI_CLK_HIGH GpioDataRegs.GPBSET.bit.GPIO60=1; //DSPIO 32 #define HF_SPI_CLK_LOW GpioDataRegs.GPBCLEAR.bit.GPIO60=1; #define HF_SPI_DATA_HIGH GpioDataRegs.GPBSET.bit.GPIO61=1; //DSPIO 33 #define HF_SPI_DATA_LOW GpioDataRegs.GPBCLEAR.bit.GPIO61=1; #define HF_SPI_SDO GpioDataRegs.GPBDATA.bit.GPIO62; //DSPIO 34 #define RESERVED_6_ON GpioDataRegs.GPBSET.bit.GPIO63=1; //DSPIO 35 - OFDS #define RESERVED_6_OFF GpioDataRegs.GPBCLEAR.bit.GPIO63=1; #define RESERVED_7_ON GpioDataRegs.GPBSET.bit.GPIO35=1; //DSPIO 36 #define RESERVED_7_OFF GpioDataRegs.GPBCLEAR.bit.GPIO35=1; #define PLL_SEN_OFF GpioDataRegs.GPBSET.bit.GPIO57 = 1; //SEN High //사용안함 - reserved #define PLL_SEN_ON GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //SEN Low #define VUHF_MB_TSW19 GpioDataRegs.GPADAT.bit.GPIO2; #define VUHF_MB_TSW20 GpioDataRegs.GPADAT.bit.GPIO3; #define VUHF_MB_BSW12A GpioDataRegs.GPADAT.bit.GPIO20; //DSPIO 15 #define VUHF_MB_BSW12B GpioDataRegs.GPADAT.bit.GPIO21; //DSPIO 16 #define VUHF_MB_BSW12C GpioDataRegs.GPADAT.bit.GPIO22; //DSPIO 17 /*====================================================================================================*/ /*===========================================TCP/IP HEADER DEFINE=====================================*/ /*====================================================================================================*/ //----------------------------------------------------------------------------------------------------- // [ Test Network Configuration Information ] // Source IP Address Register(SIPR) : 192.168.0.10 <- 192.168.1.201 // Subnet Mask Register(SUBR) : 255.255.255.0 // Gateway Address Register(GAR) : 192.168.1.1 // Source Hardware Address Register(SHAR, called by MAC Address) : 00:08:DC:F0:0F:90 // Socket 0 Port Number(S0_PORT) : 60000 //1001 // Socket 1 Port Number(S1_PORT) : 1002 // Socket 2 Port Number(S2_PORT) : 1003 // Socket 3 Port Number(S3_PORT) : 1004 // // RX/TX Memory Allocation for each socket : 2KBytes(0x800) // // 이번 예제에서 부여한 MAC Address는 리얼시스에서 테스트 목적으로 할당받은 고유의 MAC Address입니다. // 따라서 사용자께서는 추후 리얼시스에서 DSP28335 DSK KIT구매시 KIT에 있는 NM7010B+ 모듈에 붙어 있는 // 고유 MAC Address 값을 사용하시길 바랍니다. 또는 직접 W3150A+ 칩을 구매하여 보드를 제작하고자 하시는 // 사용자께서는 Wiznet사에 문의하시길 바랍니다. //---------------------------------------------------------------------------------------------------- #define IP_ADDR_SERVER 0xC0A80003 //192.168.0.3 #define IP_ADDR_CLIENT 0xC0A8000A //192.168.0.10 #define SUBNET_MASK_ADDR 0xFFFFFF00 #define GATEWAY_ADDR 0xC0A80101 //0xD2DDC101 // 0xC0A80101 #define MAC_ADDR 0x0008DCF00F91L //140623 #define SOCKET0_PORT_NUM 60002 //130821 //60000 //1001 #define SOCKET1_PORT_NUM 1002 #define SOCKET2_PORT_NUM 1003 #define SOCKET3_PORT_NUM 1004 // < W3150A+소자의 Interrupt Flag Clear > // Interrupt Flag is clearing by writing 1 to LAN_IR, LAN_S0_IR, LAN_S1_IR, LAN_S2_IR, LAN_S3_IR //--------------------------------------------------------------------------------------------- #define W3150A_COMMON_BASE_ADDR (CS7_TCPIP + 0x000000) #define W3150A_SOCKET0_BASE_ADDR (CS7_TCPIP + 0x000400) #define W3150A_SOCKET1_BASE_ADDR (CS7_TCPIP + 0x000500) #define W3150A_SOCKET2_BASE_ADDR (CS7_TCPIP + 0x000600) #define W3150A_SOCKET3_BASE_ADDR (CS7_TCPIP + 0x000700) #define W3150A_SOCKET0_TXMEM_BASE_ADDR (CS7_TCPIP + 0x004000) #define W3150A_SOCKET0_RXMEM_BASE_ADDR (CS7_TCPIP + 0x006000) #define W3150A_SOCKET1_TXMEM_BASE_ADDR (CS7_TCPIP + 0x004800) #define W3150A_SOCKET1_RXMEM_BASE_ADDR (CS7_TCPIP + 0x006800) #define W3150A_SOCKET2_TXMEM_BASE_ADDR (CS7_TCPIP + 0x005000) #define W3150A_SOCKET2_RXMEM_BASE_ADDR (CS7_TCPIP + 0x007000) #define W3150A_SOCKET3_TXMEM_BASE_ADDR (CS7_TCPIP + 0x005800) #define W3150A_SOCKET3_RXMEM_BASE_ADDR (CS7_TCPIP + 0x007800) #define SUPPORTED_SOCKET_NUMS 4 #define SOCKET_MEM_SIZE 0x800 /*0x800*/ /*2048*/ #define SOCKET_MEM_MASK 0x7FF /*0x7FF*/ /*2047*/ /* W3150A+ Common Registers */ #define LAN_MODE_ADDR (W3150A_COMMON_BASE_ADDR + 0x000000) // Mode #define LAN_GAR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000001) // Gateway Address #define LAN_SUBR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000005) // Subnet Mask Address #define LAN_SHAR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000009) // Source Hardware Address(MAC address) #define LAN_SIPR_ADDR (W3150A_COMMON_BASE_ADDR + 0x00000F) // Source IP Address #define LAN_IR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000015) // Interrupt #define LAN_IMR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000016) // Interrupt Mask #define LAN_RTR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000017) // Retry Time #define LAN_RCR_ADDR (W3150A_COMMON_BASE_ADDR + 0x000019) // Retry Count #define LAN_RMSR_ADDR (W3150A_COMMON_BASE_ADDR + 0x00001A) // RX Memory Size #define LAN_TMSR_ADDR (W3150A_COMMON_BASE_ADDR + 0x00001B) // TX Memory Size #define LAN_PATR_ADDR (W3150A_COMMON_BASE_ADDR + 0x00001C) // Authentication Type in PPPoE #define LAN_PTIMER_ADDR (W3150A_COMMON_BASE_ADDR + 0x000028) // PPP LCP Request Timer #define LAN_PMAGIC_ADDR (W3150A_COMMON_BASE_ADDR + 0x000029) // PPP LCP Magic Number #define LAN_UIPR_ADDR (W3150A_COMMON_BASE_ADDR + 0x00002A) // Unreachable IP Address #define LAN_UPORT_ADDR (W3150A_COMMON_BASE_ADDR + 0x00002E) // Unreachable Port /* W3150A+ Socket0 Registers */ #define LAN_S0_MR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000000) // Socket 0 Mode #define LAN_S0_CR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000001) // Socket 0 Command #define LAN_S0_IR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000002) // Socket 0 Interrupt #define LAN_S0_SR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000003) // Socket 0 Status #define LAN_S0_PORT_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000004) // Socket 0 Source Port #define LAN_S0_DHAR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000006) // Socket 0 Destination Hardware Address #define LAN_S0_DIPR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x00000C) // Socket 0 Destination IP Address #define LAN_S0_DPORT_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000010) // Socket 0 Destination Port #define LAN_S0_MSSR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000012) // Socket 0 Maximum Segment Size #define LAN_S0_PROTO_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000014) // Socket 0 Protocol in IR Raw Mode #define LAN_S0_TOS_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000015) // Socket 0 IP Type of Service #define LAN_S0_TTL_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000016) // Socket 0 IP Time to TTL(live) #define LAN_S0_TX_FSR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000020) // Socket 0 TX Free Size #define LAN_S0_TX_RD_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000022) // Socket 0 TX Read Pointer #define LAN_S0_TX_WR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000024) // Socket 0 TX Write Pointer #define LAN_S0_RX_RSR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000026) // Socket 0 Received Size #define LAN_S0_RX_RD_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x000028) // Socket 0 RX Read Pointer #define LAN_S0_RX_WR_ADDR (W3150A_SOCKET0_BASE_ADDR + 0x00002A) // Socket 0 RX Write Pointer /* W3150A+ Socket1 Registers */ #define LAN_S1_MR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000000) // Socket 1 Mode #define LAN_S1_CR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000001) // Socket 1 Command #define LAN_S1_IR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000002) // Socket 1 Interrupt #define LAN_S1_SR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000003) // Socket 1 Status #define LAN_S1_PORT_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000004) // Socket 1 Source Port #define LAN_S1_DHAR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000006) // Socket 1 Destination Hardware Address #define LAN_S1_DIPR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x00000C) // Socket 1 Destination IP Address #define LAN_S1_DPORT_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000010) // Socket 1 Destination Port #define LAN_S1_MSSR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000012) // Socket 1 Maximum Segment Size #define LAN_S1_PROTO_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000014) // Socket 1 Protocol in IR Raw Mode #define LAN_S1_TOS_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000015) // Socket 1 IP Type of Service #define LAN_S1_TTL_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000016) // Socket 1 IP Time to TTL(live) #define LAN_S1_TX_FSR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000020) // Socket 1 TX Free Size #define LAN_S1_TX_RD_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000022) // Socket 1 TX Read Pointer #define LAN_S1_TX_WR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000024) // Socket 1 TX Write Pointer #define LAN_S1_RX_RSR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000026) // Socket 1 Received Size #define LAN_S1_RX_RD_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x000028) // Socket 1 RX Read Pointer #define LAN_S1_RX_WR_ADDR (W3150A_SOCKET1_BASE_ADDR + 0x00002A) // Socket 1 RX Write Pointer /* W3150A+ Socket2 Registers */ #define LAN_S2_MR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000000) // Socket 2 Mode #define LAN_S2_CR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000001) // Socket 2 Command #define LAN_S2_IR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000002) // Socket 2 Interrupt #define LAN_S2_SR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000003) // Socket 2 Status #define LAN_S2_PORT_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000004) // Socket 2 Source Port #define LAN_S2_DHAR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000006) // Socket 2 Destination Hardware Address #define LAN_S2_DIPR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x00000C) // Socket 2 Destination IP Address #define LAN_S2_DPORT_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000010) // Socket 2 Destination Port #define LAN_S2_MSSR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000012) // Socket 2 Maximum Segment Size #define LAN_S2_PROTO_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000014) // Socket 2 Protocol in IR Raw Mode #define LAN_S2_TOS_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000015) // Socket 2 IP Type of Service #define LAN_S2_TTL_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000016) // Socket 2 IP Time to TTL(live) #define LAN_S2_TX_FSR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000020) // Socket 2 TX Free Size #define LAN_S2_TX_RD_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000022) // Socket 2 TX Read Pointer #define LAN_S2_TX_WR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000024) // Socket 2 TX Write Pointer #define LAN_S2_RX_RSR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000026) // Socket 2 Received Size #define LAN_S2_RX_RD_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x000028) // Socket 2 RX Read Pointer #define LAN_S2_RX_WR_ADDR (W3150A_SOCKET2_BASE_ADDR + 0x00002A) // Socket 2 RX Write Pointer /* W3150A+ Socket3 Registers */ #define LAN_S3_MR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000000) // Socket 3 Mode #define LAN_S3_CR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000001) // Socket 3 Command #define LAN_S3_IR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000002) // Socket 3 Interrupt #define LAN_S3_SR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000003) // Socket 3 Status #define LAN_S3_PORT_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000004) // Socket 3 Source Port #define LAN_S3_DHAR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000006) // Socket 3 Destination Hardware Address #define LAN_S3_DIPR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x00000C) // Socket 3 Destination IP Address #define LAN_S3_DPORT_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000010) // Socket 3 Destination Port #define LAN_S3_MSSR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000012) // Socket 3 Maximum Segment Size #define LAN_S3_PROTO_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000014) // Socket 3 Protocol in IR Raw Mode #define LAN_S3_TOS_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000015) // Socket 3 IP Type of Service #define LAN_S3_TTL_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000016) // Socket 3 IP Time to TTL(live) #define LAN_S3_TX_FSR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000020) // Socket 3 TX Free Size #define LAN_S3_TX_RD_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000022) // Socket 3 TX Read Pointer #define LAN_S3_TX_WR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000024) // Socket 3 TX Write Pointer #define LAN_S3_RX_RSR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000026) // Socket 3 Received Size #define LAN_S3_RX_RD_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x000028) // Socket 3 RX Read Pointer #define LAN_S3_RX_WR_ADDR (W3150A_SOCKET3_BASE_ADDR + 0x00002A) // Socket 3 RX Write Pointer /* MR(Common Mode Register) bit position definition */ #define MR_RST_BIT BIT7_POS // S/W Reset #define MR_PB_BIT BIT4_POS // Ping Block Mode #define MR_PPPOE_BIT BIT3_POS // PPPoE Mode #define MR_LB_BIT BIT2_POS // little or big endian selector in indirect mode #define MR_AI_BIT BIT1_POS // Address Auto-Increment in Indirect Bus I/F #define MR_IND_BIT BIT0_POS // Indirect Bus I/F mode /* IR(Interrupt Register) & IMR(Interrupt Mask Register) bit position definition */ #define INT_CONFLICT_BIT BIT7_POS // IP Conflict #define INT_UNREACH_BIT BIT6_POS // Destination unreachable #define INT_PPPOE_BIT BIT5_POS // PPPoE Close #define INT_S3_BIT BIT3_POS // Occurence of Socket 3 Interrupt #define INT_S2_BIT BIT2_POS // Occurence of Socket 2 Interrupt #define INT_S1_BIT BIT1_POS // Occurence of Socket 1 Interrupt #define INT_S0_BIT BIT0_POS // Occurence of Socket 0 Interrupt /* Authentication type in PPPoE mode */ #define PPPOE_PAP_MODE 0xC023 #define PPPOE_CHAP_MODE 0xC223 /* Socket Mode Register bit position definition */ #define SMR_MULTI_BIT BIT7_POS // Muticasting Mode(is applied only in case of UDP) #define SMR_NDMC_BIT BIT6_POS // Use No Delayed ACK Mode or what IGMP version is used in UDP mode #define SOCKET_CLOSED_MODE 0 #define SOCKET_TCP_MODE 1 #define SOCKET_UDP_MODE 2 #define SOCKET_IPRAW_MODE 3 #define SOCKET_MACROW_MODE 4 // is applied only in case of socket 0 #define SOCKET_PPPOE_MODE 5 // is applied only in case of socket 0 /* Socket Command Register */ #define SOCKET_OPEN_CMD 0x01 // is used to initialize the socket #define SOCKET_LISTEN_CMD 0x02 // is only used in TCP mode(TCP/IP server mode) #define SOCKET_CONNECT_CMD 0x04 // is only used in TCP mode(TCP/IP client mode) #define SOCKET_DISCON_CMD 0x08 // is only used in TCP mode(TCP/IP server mode) #define SOCKET_CLOSE_CMD 0x10 // is used to close the socket #define SOCKET_SEND_CMD 0x20 // transmits the data as much as the increased size of Socket n TX write pointer #define SOCKET_SEND_MAC_CMD 0x21 // is used in UDP mode #define SOCKET_SEND_KEEP_CMD 0x22 // is used in TCP mode #define SOCKET_RECV_CMD 0x40 // receiving is processed with the value of Socket n RX Read Pointer Register // The below command is only used in PPPoE mode #define SOCKET_PCON_CMD 0x23 #define SOCKET_PDISCON_CMD 0x24 #define SOCKET_PCR_CMD 0x25 #define SOCKET_PCN_CMD 0x26 #define SOCKET_PCJ_CMD 0x27 /* Socket Interrupt Register bit position definition */ #define SINT_SEND_OK_BIT BIT4_POS // is set if send operation is completed #define SINT_TIMEOUT_BIT BIT3_POS // is set if timeout occurs #define SINT_RECV_BIT BIT2_POS // is set if data is received #define SINT_DISCON_BIT BIT1_POS // is set if connection termination is requested or finished #define SINT_CON_BIT BIT0_POS // is set if connection is established // The below interrupt is only used in PPPoE mode #define SINT_PRECV_BIT BIT7_POS #define SINT_PFAIL_BIT BIT4_POS #define SINT_PNEXT_BIT BIT3_POS /* Socket Status Register */ #define SOCKET_CLOSED_STATUS 0x00 #define SOCKET_INIT_STATUS 0x13 #define SOCKET_LISTEN_STATUS 0x14 #define SOCKET_SYNSENT_STATUS 0x15 #define SOCKET_SYNRECV_STATUS 0x16 #define SOCKET_ESTABLISHED_STATUS 0x17 #define SOCKET_FIN_WAIT_STATUS 0x18 #define SOCKET_CLOSING_STATUS 0x1A #define SOCKET_TIME_WAIT_STATUS 0x1B #define SOCKET_CLOSE_WAIT_STATUS 0x1C #define SOCKET_LAST_ACK_STATUS 0x1D #define SOCKET_UDP_STATUS 0x22 #define SOCKET_IPRAW_STATUS 0x32 #define SOCKET_MACRAW_STATUS 0x42 #define SOCKET_PPPOE_STATUS 0x5F /* IP Protocol Type */ #define IPPROTO_IP 0 /* Dummy for IP */ #define IPPROTO_ICMP 1 /* Control message protocol */ #define IPPROTO_IGMP 2 /* Internet group management protocol */ #define IPPROTO_GGP 3 /* Gateway^2 (deprecated) */ #define IPPROTO_TCP 6 /* TCP */ #define IPPROTO_PUP 12 /* PUP */ #define IPPROTO_UDP 17 /* UDP */ #define IPPROTO_IDP 22 /* XNS idp */ #define IPPROTO_ND 77 /* UNOFFICIAL net disk protocol */ #define IPPROTO_RAW 255 /* Raw IP packet */ #define ENABLE_LAN_INT (PieCtrlRegs.PIEIER12.bit.INTx5 = 1) // Enable W3150A+ interrupt #define DISABLE_LAN_INT (PieCtrlRegs.PIEIER12.bit.INTx5 = 0) // Disable W3150A+ interrupt /*===============================================================================*/ /*================================= HMC830 Define ===============================*/ /*===============================================================================*/ #define HMC830_REG00H 0x0000 #define HMC830_REG01H 0x0010 #define HMC830_REG02H 0x0020 #define HMC830_REG03H 0x0030 #define HMC830_REG04H 0x0040 #define HMC830_REG05H 0x0050 #define HMC830_REG06H 0x0060 #define HMC830_REG07H 0x0070 #define HMC830_REG08H 0x0080 #define HMC830_REG09H 0x0090 #define HMC830_REG0AH 0x00A0 #define HMC830_REG0BH 0x00B0 #define HMC830_REG0CH 0x00C0 #define HMC830_REG0DH 0x00D0 #define HMC830_REG0EH 0x00E0 #define HMC830_REG0FH 0x00F0 #define HMC830_REG10H 0x0100 #define HMC830_REG11H 0x0110 #define HMC830_REG12H 0x0120 #define HMC830_REG13H 0x0130 #define HMC830_RD 0x8000 #define HMC830_WR 0x0000 #define PLL_DATA_HIGH GpioDataRegs.GPBSET.bit.GPIO54 = 1; #define PLL_DATA_LOW GpioDataRegs.GPBCLEAR.bit.GPIO54 = 1; #define PLL_RD_DATA GpioDataRegs.GPBDAT.bit.GPIO55; #define PLL_CLK_HIGH GpioDataRegs.GPBSET.bit.GPIO56 = 1; #define PLL_CLK_LOW GpioDataRegs.GPBCLEAR.bit.GPIO56 = 1; #define PLL_EN_HIGH GpioDataRegs.GPBSET.bit.GPIO57 = 1; #define PLL_EN_LOW GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; extern Uint16 RamfuncsLoadStart; extern Uint16 RamfuncsLoadEnd; extern Uint16 RamfuncsRunStart; extern double dOrderFrequency; /*=======================FPGA========================*/ extern Uint16 maDspRelay; extern Uint16 mbDspRelay; extern Uint16 mcDspRelay; extern Uint16 mdDspRelay; extern Uint16 meDspRelay; extern Uint16 mfDspRelay; extern Uint16 mgDspRelay; extern Uint16 mhDspRelay; extern Uint16 miDspRelay; extern Uint16 maDspSwitch; extern Uint16 mbDspSwitch; /*=====================PROCESS=======================*/ extern Uint16 flagRfOn; extern Uint16 flagMessageDisplay; extern Uint16 flagMainInterLockFail; extern Uint16 flagRfInterLockFail; extern Uint16 flagSmpsFail; extern Uint16 flagFanFail; extern Uint16 flagTempFail; /*===================== EEPROM & I2C ====================*/ extern Uint16 E2promReadBuf; extern Uint16 i2c_tx_buf[16]; extern Uint16 i2c_rx_buf[16]; extern Uint16 E2pReadBuf[16]; extern Uint16 RxDataBuf[64][16]; //Uint16 RxDataBuf[1024][16]; extern Uint16 E2pWriteData[16]; extern Uint16 E2pReadData[1024]; extern Uint16 E2promWriteBuf[16]; extern double nRSSI_Offset_HF1; extern double nRSSI_Offset_HF2; extern double nRSSI_Offset_VUHF1; extern double nRSSI_Offset_VUHF2; extern double nRSSI_Offset_UHF1; extern double nRSSI_Offset_UHF2; /*======================== SCI ==========================*/ extern Uint16 TxDataLength; extern Uint16 flagSendData; extern Uint16 RxDataCommand; extern Uint16 RxDataBufLength; extern Uint16 nLcdCommand; extern Uint16 flagCurrentAlarm; extern Uint16 flagRfAlarm; extern Uint16 RxDataLength; extern Uint16 RxDataValue; extern Uint16 flagPCRxData; //130102 extern Uint16 PCTxBuffer[TX_DATA_SIZE]; //#define TX_DATA_SIZE 64 extern Uint16 RxDataStore[RX_DATA_SIZE]; extern Uint16 RxDataStore1[RX_DATA_SIZE]; extern Uint16 RxDataStore2[RX_DATA_SIZE]; extern Uint16 RxDataStore3[RX_DATA_SIZE]; extern Uint16 SCI_RXintCount; extern Uint16 StatusBuf[20]; extern Uint16 nModule; /*====================== DSP ADC ========================*/ /*extern Uint16 nAdc_Temp; extern Uint16 nAdc_HF1; extern Uint16 nAdc_HF2; extern Uint16 nAdc_VUHF1; extern Uint16 nAdc_VUHF2; extern Uint16 nAdc_UHF1; extern Uint16 nAdc_UHF2;*/ extern Uint16 ADC_HF1_Buf[DSP_ADC_BUFFER]; //#define DSP_ADC_BUFFER 32 extern Uint16 ADC_HF2_Buf[DSP_ADC_BUFFER]; extern Uint16 ADC_VUHF1_Buf[DSP_ADC_BUFFER]; extern Uint16 ADC_VUHF2_Buf[DSP_ADC_BUFFER]; extern Uint16 ADC_UHF1_Buf[DSP_ADC_BUFFER]; extern Uint16 ADC_UHF2_Buf[DSP_ADC_BUFFER]; extern Uint16 ADC_TEMP_Buf[DSP_ADC_BUFFER]; extern float fADC_HF1_Sum; extern float fADC_HF2_Sum; extern float fADC_VUHF1_Sum; extern float fADC_VUHF2_Sum; extern float fADC_UHF1_Sum; extern float fADC_UHF2_Sum; extern float fADC_TEMP_Sum; extern float fADC_HF1_Ave; extern float fADC_HF2_Ave; extern float fADC_VUHF1_Ave; extern float fADC_VUHF2_Ave; extern float fADC_UHF1_Ave; extern float fADC_UHF2_Ave; extern float fADC_TEMP_Ave; extern float fAdc_Temp_Volt; extern float fAdc_HF1_Volt; extern float fAdc_HF2_Volt; extern float fAdc_VUHF1_Volt; extern float fAdc_VUHF2_Volt; extern float fAdc_UHF1_Volt; extern float fAdc_UHF2_Volt; extern Uint16 nAdc_Temp_mV; extern Uint16 nAdc_HF1_mV; extern Uint16 nAdc_HF2_mV; extern Uint16 nAdc_VUHF1_mV; extern Uint16 nAdc_VUHF2_mV; extern Uint16 nAdc_UHF1_mV; extern Uint16 nAdc_UHF2_mV; /*======================= Timer =========================*/ extern Uint32 t_cnt0; extern Uint32 t_cnt1; extern Uint32 t_cnt2; extern Uint16 tmr1ms; extern Uint16 tmr5ms; extern Uint16 tmr10ms; extern Uint16 tmr20ms; extern Uint16 tmr30ms; extern Uint16 tmr50ms; extern Uint16 tmr100ms; extern Uint16 tmr300ms; extern Uint16 tmr500ms; extern Uint16 tmr1000ms; extern Uint16 flag1ms; extern Uint16 flag5ms; extern Uint16 flag10ms; extern Uint16 flag20ms; extern Uint16 flag30ms; extern Uint16 flag50ms; extern Uint16 flag100ms; extern Uint16 flag300ms; extern Uint16 flag500ms; extern Uint16 flag1000ms; extern Uint16 Timer0_1msCounter; extern Uint16 Timer0_5msCounter; extern Uint16 Timer0_10msCounter; extern Uint16 Timer0_20msCounter; extern Uint16 Timer0_30msCounter; extern Uint16 Timer0_50msCounter; extern Uint16 Timer0_100msCounter; extern Uint16 Timer0_300msCounter; extern Uint16 Timer0_500msCounter; extern Uint16 Timer0_1secCounter; extern Uint16 Timer0_100usCounter; /*===================== Processing =======================*/ extern Uint16 AlarmBuf; extern Uint16 Alarm_old; extern Uint16 ExtInputBuf; extern Uint16 ExtInput_old; extern Uint16 flagSetValueFast; extern Uint16 flagRfOnAgc; extern Uint16 seqPulsePower; extern Uint16 tmrPulsePower; /*===================== GPIO Switch ======================*/ extern Uint16 FSW0; extern Uint16 FSW1; extern Uint16 FSW2; extern Uint16 FSW3; extern Uint16 FSW4; extern Uint16 FSW5; extern Uint16 FSW6; extern Uint16 FSW7; extern Uint16 fswBuf0; extern Uint16 fswBuf1; extern Uint16 FSW_old0; extern Uint16 FSW_old1; extern Uint16 flagFSW2; extern Uint16 flagFSW3; extern Uint16 flagFSW4; extern Uint16 flagFSW5; extern Uint16 flagFSW6; extern Uint16 flagFSW7; extern Uint16 flagLup; extern Uint16 flagLdn; extern Uint16 flagTup; extern Uint16 flagTdn; extern Uint16 tmrBtnLoadUp; extern Uint16 tmrBtnLoadDown; extern Uint16 tmrBtnTuneUp; extern Uint16 tmrBtnTuneDown; extern Uint16 flagFbtnUp; extern Uint16 flagFbtnDown; extern Uint16 flagFbtnUp; extern Uint16 flagFbtnDown; extern Uint16 tmrBtnUp; extern Uint16 tmrBtnDown; extern Uint16 flagFbtn0; extern Uint16 flagFbtn1; extern Uint16 flagFbtn2; extern Uint16 flagFbtn3; extern Uint16 flagFbtn4; extern Uint16 flagFbtn5; extern Uint16 flagFbtn6; extern Uint16 flagFbtn7; /*======================= IO ========================*/ extern Uint16 flagInputSensor; extern Uint16 flagAntennaDetect_HF1; extern Uint16 flagAntennaDetect_VUHF; extern Uint16 flagAntennaDetect_UHF1; //Vertical extern Uint16 flagAntennaDetect_UHF2; //Horyzontal extern Uint16 flagAntennaDetect_HF2; extern Uint16 flagRfDetect_HF0; extern Uint16 flagRfDetect_HF1; extern Uint16 flagRfDetect_HF2; extern Uint16 flagRfDetect_HF3; extern Uint16 flagRfDetect_HF4; extern Uint16 flagRfDetect_HF5; extern Uint16 flagRfDetect_VUHF_MB0; extern Uint16 flagRfDetect_VUHF_MB1; extern Uint16 flagRfDetect_VUHF_MB2; extern Uint16 flagRfDetect_VUHF_MB3; extern Uint16 flagRfDetect_VUHF_MB4; extern Uint16 flagRfDetect_VUHF_MB5; extern Uint16 flagRfDetect_VUHF_MB6; extern Uint16 flagRfDetect_VUHF_MB7; extern Uint16 flagRfDetect_VUHF_MB8; extern Uint16 flagRfDetect_VUHF_MB9; extern Uint16 flagRfDetect_VUHF_MB10; extern Uint16 flagRfDetect_VUHF_MB11; extern Uint16 flagRfDetect_VUHF_MB12A; extern Uint16 flagRfDetect_VUHF_MB13A; extern Uint16 flagRfDetect_VUHF_MB12B; extern Uint16 flagRfDetect_VUHF_MB13B; extern Uint16 nRfAlarmNo_HF; extern Uint16 nRfAlarmNo_VUHF_MB; extern Uint16 nRfAlarmNo_UHF; extern Uint16 nCurrentAlarmNo; /*=================================== ETHERNET =====================================*/ /*=================================TCP/IP Source====================================*/ extern WORD flagRtlCommand; //!!!!! Copy from AWCPUH!D extern char tcpip_rxd; // 수신한 문자(ex11_tcpip.c 파일에 정의) // TCP/IP 통신 관련 변수 --------------------------------------- extern BOOL s0_init; // Socket0의 초기화 여부 상태 플래그 extern BOOL s0_connected; // Socket0의 TCP/IP 연결 상태 플래그 extern /*unsigned*/ char s0_tx_buffer[SOCKET_MEM_SIZE]; // Socket0 TX Buffer extern /*unsigned*/ char s0_rx_buffer[SOCKET_MEM_SIZE]; // Socket0 RX Buffer //-------------------------------------------------------------- extern WORD testBuf0,testBuf1,testBuf2,testBuf3,testBuf4; extern LONG testBuf0L,testBuf1L,testBuf2L,testBuf3L,testBuf4L; extern BYTE xint7_cnt; extern WORD nPacketLength; extern WORD qtyRcvA; extern Uint16 s0_irx_Index; extern Uint16 s0_irx_Class1; extern Uint16 s0_irx_Class2; extern Uint16 s0_irx_Type; extern Uint32 s0_irx_DataSize; extern Uint32 s0_irx_Data[10]; /*======================= PLL ========================*/ extern Uint32 nInt; extern Uint32 nFrac; extern Uint16 nRcount; extern Uint16 nKcount; extern Uint16 flagWriteHmc830; extern Uint16 flagReadHmc830; extern Uint16 TxBuf_H; extern Uint16 TxBuf_L; extern Uint32 Hmc830Data; extern Uint32 nHmc830Reg[20]; /*======================= ICD ===========================================================*/ extern Uint32 lData[6]; /*======================= 0x00 path set =================================================*/ extern Uint16 flagGatePath_HF; extern Uint16 flagGatePath_VUHF; extern Uint16 flagGatePath_UHF; extern Uint16 flagDirec_Module1_HF; extern Uint16 flagDirec_ModuleAll_HF; extern Uint16 flagOmni_ModuleAll_HF; extern Uint16 flagDirec_Module1_VUHF; extern Uint16 flagDirec_ModuleAll_VUHF; extern Uint16 flagOmni_ModuleAll_VUHF; extern Uint16 flagDirec_Module1_UHF; extern Uint16 flagDirec_ModuleAll_UHF; extern Uint16 flagOmni_ModuleAll_UHF; /*======================= 0x01 thru/amp set =============================================*/ //extern Uint16 flagAmpMode_HF; //extern Uint16 flagAmpMode_VUHF; //extern Uint16 flagAmpMode_UHF; //extern Uint16 flagAmpMode_HF_Direc; //extern Uint16 flagAmpMode_VUHF_Direc; //extern Uint16 flagAmpMode_UHF_Direc; //extern Uint16 flagAmpMode_HF_Omni; //extern Uint16 flagAmpMode_VUHF_Omni; //extern Uint16 flagAmpMode_UHF_Omni; extern Uint16 flagAmpMode_HF_Direc_Thru; extern Uint16 flagAmpMode_HF_Direc_20dB; //extern Uint16 flagAmpMode_HF_Direc_10dB; extern Uint16 flagAmpMode_HF_Omni_Thru; extern Uint16 flagAmpMode_HF_Omni_20dB; //extern Uint16 flagAmpMode_HF_Omni_10dB; extern Uint16 flagAmpMode_VUHF_Direc_Thru; extern Uint16 flagAmpMode_VUHF_Direc_20dB; //extern Uint16 flagAmpMode_VUHF_Direc_10dB; extern Uint16 flagAmpMode_VUHF_Omni_Thru; extern Uint16 flagAmpMode_VUHF_Omni_20dB; extern Uint16 flagAmpMode_VUHF_Omni_10dB; extern Uint16 flagAmpMode_UHF_Direc_Thru; extern Uint16 flagAmpMode_UHF_Direc_20dB; extern Uint16 flagAmpMode_UHF_Direc_10dB; extern Uint16 flagAmpMode_UHF_Omni_Thru; extern Uint16 flagAmpMode_UHF_Omni_20dB; extern Uint16 flagAmpMode_UHF_Omni_10dB; //extern Uint16 flagAmpMode_Antenna_Omni; //extern Uint16 flagAmpMode_Antenna_Direc; //extern Uint16 flagAmpMode_THRU; //extern Uint16 flagAmpMode_20dB; //extern Uint16 flagAmpMode_10dB; /*======================= 0x02 directional antenna direction set ========================*/ //extern Uint16 flagDirecAntenna_VUHF; //extern Uint16 flagDirecAntenna_UHF; extern Uint16 flagDirecAntenna_VUHF_Angle120; extern Uint16 flagDirecAntenna_VUHF_Angle240; extern Uint16 flagDirecAntenna_VUHF_Angle360; extern Uint16 flagDirecAntenna_UHF_Angle120; extern Uint16 flagDirecAntenna_UHF_Angle240; extern Uint16 flagDirecAntenna_UHF_Angle360; //extern Uint16 flagAntennaAngle_120; //extern Uint16 flagAntennaAngle_240; //extern Uint16 flagAntennaAngle_360; /*======================= 0x03 brf set ==================================================*/ //extern Uint16 flagVUHF_BRF_Direc; //extern Uint16 flagVUHF_BRF_Omni; extern Uint16 flagVUHF_Direc_BRF_THRU; extern Uint16 flagVUHF_Direc_BRF_DMB; extern Uint16 flagVUHF_Direc_BRF_FM; extern Uint16 flagVUHF_Omni_BRF_THRU; extern Uint16 flagVUHF_Omni_BRF_DMB; extern Uint16 flagVUHF_Omni_BRF_FM; //extern Uint16 flagBrfMode_Antenna_Omni; //extern Uint16 flagBrfMode_Antenna_Direc; //extern Uint16 flagBrfMode_THRU; //extern Uint16 flagBrfMode_DMB; //extern Uint16 flagBrfMode_FM; /*======================= 0x04 uhf omni-directional antenna set ========================*/ extern Uint16 flagUHF_Vertical; extern Uint16 flagUHF_Horizontal; /*======================= 0x05 bit request =============================================*/ /*======================= 0x06 bit source set ==========================================*/ extern Uint16 flagSourceTcxo; extern Uint16 flagSourceExt; /*======================= 0x07 hf bit gate path set ====================================*/ /*======================= 0x08 vuhf bit gate path set ==================================*/ /*======================= 0x09 uhf bit gate path set ===================================*/ /*======================= 0x0a rssi result request =====================================*/ extern Uint16 flagRssiBand_HF; extern Uint16 flagRssiBand_VUHF; extern Uint16 flagRssiBand_UHF; extern Uint16 nRssiBand; extern Uint16 nRssiAntenna; extern Uint32 nRSSI_Value; /*======================= 0x0b rssi result repeat time set =============================*/ extern Uint16 nRepeatTime; extern Uint16 nRssiCheckTime; extern Uint16 flagUpdate_RSSI_Result; /*======================= 0x0c software version request ================================*/ /*======================= 0x0d path status =============================================*/ extern Uint16 nSetPath_HF; extern Uint16 nSetPath_VUHF; extern Uint16 nSetPath_UHF; extern Uint16 nSetAmp_Direc_HF; extern Uint16 nSetAmp_Direc_VUHF; extern Uint16 nSetAmp_Direc_UHF; extern Uint16 nSteAmp_Omni_HF; extern Uint16 nSetAmp_Omni_VUHF; extern Uint16 nSetAmp_Omni_UHF; extern Uint16 nSetAntenna_Angle_VUHF; extern Uint16 nSetAntenna_Angle_UHF; extern Uint16 nSetBRF_Direc_VUHF; extern Uint16 nSetBRF_Omni_VUHF; extern Uint16 nSetPol_UHF; /*======================= 0x0e rf unit control request =================================*/ extern Uint16 flagRfUnit_Musun; extern Uint16 flagRfUnit_Janpa; extern Uint16 nCmd_Class1; extern Uint16 nCmd_Class2; extern Uint16 nType; extern Uint32 nDataSize; extern Uint16 nData[32]; extern Uint16 nCommand; extern Uint32 nResponse; //extern Uint32 lAmpPath; extern Uint32 lBitStatus; extern Uint16 nP_Bit_Common; extern Uint32 nP_Bit_Result; //140313 long change - UHF Bit 결과 누락됨 extern Uint32 nP_Bit_Result_Thru; //140313 long change - UHF Bit 결과 누락됨 extern Uint32 nP_Bit_Result_Amp; //140313 long change - UHF Bit 결과 누락됨 extern Uint16 nBitOutHF; extern Uint16 nBitOutVUHF; extern Uint16 nBitOutUHF; extern Uint16 flagThruPath_HF; extern Uint16 flagThruPath_UHF; extern Uint16 flagThruPath_VUHF; extern Uint16 flagAmpPath_HF; extern Uint16 flagAmpPath_UHF; extern Uint16 flagAmpPath_VUHF; extern Uint16 nN_int; extern double dN_frac; extern Uint32 lReg04Data; /*======================== Tunable Filter =========================*/ extern Uint16 nFilterFreq; extern Uint16 nFilterData; extern double dIcdSet_Fvco; extern double dIcdSet_Fout; extern Uint16 flagTuneFilterOn; /*======================== ? =========================*/ extern Uint16 flagRealCheckRssi; //140616