or TX FSR zero jump with TX Buffer not full
Dear WIZnet Team,
Situation
we use the W5300 chip to send measurement data from hardware to a PC. The W5300 is connected directly (no switch) via 100Mbit LAN to the PC. Data packets are 1460 Bytes and data rate is 1.16 Mbps. The data is sent continuously. The socket (S0) is configured as a TCP socket and is only used for sending. The TX buffer size is 64KB (RX buffer is 8KB). The WIZnet chip is configured via an FPGA using 16-bit direct addressing. Sending routine is implemented as described in the data sheet: check SSR, check SENDOK, check FSR, write 1460 bytes to S0_TX_FIFOR, write S0_TX_WRSR, write S0_CR, check SSR, etc.
Three sockets are used: the described S0 TCP socket, another TCP, and an UDP socket. But most of the time only S0 is used.
Problem
Most of the time the sending process works well but sometimes data packets get lost.
To investigate the problem, we integrated an analyzer on the FPGA side and observed the data stream on the PC side with Wireshark.
The analyzer showed that the send routine sometimes hangs because the TX FSR is zero (the buffer for the measurement data then overflows and data is lost). The strange thing is that the TX FSR shows 0 long before the TX buffer is full.
On closer inspection, the FSR always was on 43636 bytes before the next value was 0. I.e. if there were 15 packets in the TX buffer (65536 - 43636 = 21900 / 1460 = 15), the FSR showed 0 next. After a certain time, the FSR jumped back to the old value 43636 and transmission routine was continued. To observe the behaviour in wireshark, the FSR value was written in each packet and also a marker in the first packet sent after the “FSR-zero-pause”.
During the FSR-zero-pause the SSR is 0x0917. According to [this breakdown] (W5300 SENDOK and Reserved Status Byte), a reserved byte = 9 (1001) means
- 3rd Bit: No more transit until ack number is received.
- 0th Bit: Tx buffer full
But as can be seen in wireshark, the matching ACKs are sent without delay and the TX buffer cannot yet be full.
A similar problem was described by jmattfeld in Feb. 19
Approaches we tried in vain to solve the problem
- Check TMSR, RMSR and MTYPER, try different sizes
- Do the Memory Test: “How to Test Internal TX/RX Memory in W5300” => O.K.
- Use BRDY instead of reading FSR to check TX-Buffer free size => confirms FSR-Zero-jump
- Use an other socket
- Check read and write timings
- Check all W5300 register values
- Lower the data rate
- Sending bigger or smaller packets
- Put check SENDOK after write S0_TX_FIFOR (before write S0_TX_WRSR)
- Write to S0_TX_FIFOR without checking FSR
Question
Is there anyone in the wiznet team who was maybe involved in the development of W5300 chip and has an idea about the cause of this behaviour?
Thank you very much