Schematic Review: W5500


I am working with a custom board using W5500 and I noticed some key differences between this schematic versus the evaluation board one - W5500-EVB. I have listed them below:

  1. Does leaving the “RSVD” pins (Especially pin 23) NC have an affect on the performance of the chip or anything else? I noticed they are pulled down in the eval board.

  2. Pin 37 (nRST) is pulled high in the eval board. I was wondering why it would be pulled high? Our processor controls it and we have pulldown to make sure it is reset on power up

  3. RXP and RXN signals have 6.8nF caps each in series with their connector. We don’t have these caps, I am assuming these are for removing the DC aspect of the signals. We are using this connector: 74984104400. Could this be an issue?

  4. There is a current limiting resistor (R30 - 10 ohm) on the TXP pin in the evaluation board, we don’t have this. Could this be an issue?

  5. Lastly, we are using 0.1uF instead of 22nF for C17 and C26. Could this be an issue

  1. putting resistors or their placeholders is a best practice. You would want to solder 10k resistors to required position instead of relying onto the internal pull-ups down. I think any solution would work, open pins or high value resistors.
  2. Pull up is requires to ensure high level if your MCU has went tristate. In general it provides logical 1 if no one drives the line. If you are sure that your MCU is always alive on the line - you may omit the resistor, but it is very advisable to still have it in place.
  3. What issue? Caps are required, there’s no question here.
  4. show the circuit diagram.
  5. Are you trying to solve the problem that has already surfaced? If yes, then you must explain the problem, differences and then ask for advice. Otherwise it sounds like “can I replace oranges with apples in this salad?”

Sorry that I am posting here as I could not start a new subject.

This is a schematic to have ethernet using W5500 over SPI of ESP32.

Can you please review it and point any mistakes, and improvements I can do for a stable connection?

I also have to keep in mind the ESD, EMI/EMC issues.

Thank you very much,

Why do you put TVS diodes in there? Jack has transformer effectively isolating the external world from the PHY.

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I read couple of posts on this forum and elsewhere that TVS diodes after transformer may help against ESDs. Need to do FCC/CE so trying to take extra care. Are there something else that I could fix on the schematic or should I consider when routing traces?