WIZnet Developer Forum

How to use ioLibrary?

I am trying to get the Wiz550io running with my Atmel. I downloaded the ioLibrary from gitHub, and noticed that w5500.c defines the SPI communication functions, but I have my own functions specific to the Atmel. How does this work? I guess what I’m trying to ask is, can anyone walk me through the functions I need to use in order to get my Atmel connected to a webserver? The biggest problem is getting DHCP working. Thanks!

If you have a good understanding of your MPU and your development system then write a library for comunincare with a DHCP server is relatively easy.
On the Internet you can find many examples of this on the formatting of the message to be sent in UDP and can extract the functions that you need to drive the W5500 directly from the two sources for example in the DHCP and DNS that you can download from the site where you can find the datasheet for the wiznet device.
The example of the DHCP/DNS can be used to understand the SPI protocol to communicate with the W5500 in terms of registers.
Once you have figured out how by setting up a UDP communication with DHCP and you are able to read the contents of the receive buffer can switch to HTTP communication to a web server where you need instead connect with TCP.
In the two examples above has the Connect () to do so.

For an Atmel ATMEGA1284P I use the following routines and others that were adapted from the ioLibrary . The buffer read/write function in fixed mode had erros that were fixed. (I modified an old ioLibrary and maybe it was corrected since).
The variable wc_error is used to detect if the W5500 answered correctly during the address phase. As SPI is addressing I noted that the bytes read from W5500 have the numbering 01, 02, 03 , so I am trying to use it as an access error detection.
It is experimental and maybe disabled commenting the respective define.
I also modified all 16 bit registers read/write to use a more efficient WORD read/write function.

Example:
#define getPSID() WIZCHIP_READ_W( PSID )

uint16_t psid;
psid = getPSID();

//SPI driver
uint8_t USART0_SPI_rwby( uint8_t P_txbyte )
{
#define SPI_RBS 0xff //SPI MOSI read byte state.

wdt_reset(); //Resets Watch Dog Timer

//Waits until TX buffer is empty.
while ( !( UCSR0A & (1<<UDRE0)) );

//Sends byte.
UDR0 = P_txbyte;

//Waits reception of byte from W5500 (MISO line).
while ( !(UCSR0A & (1<<RXC0)) );

//Returns received byte.
return ( UDR0 );
}

Initializes USART0 for SPI Master use:
{
//Baud Rate = CLK/2.
UBRR0 = 0;
XCK0_DDR |= (1<<XCK0);
//SPI master, MSBit first and mode 0.
//iom1284p.h does not have the defines below:
#define UDORD0 UCSZ01
#define UCPHA0 UCSZ00
UCSR0C = (1<<UMSEL01)|(1<<UMSEL00)|(0<<UDORD0)|(0<<UCPHA0)|(0<<UCPOL0);
//Enables TX e RX but leaves ints disabled.
UCSR0B = (0<<RXCIE0)|(0<<TXCIE0)|(0<<UDRIE0)|(1<<RXEN0)|(1<<TXEN0);
//If baud != CLK/2 needs to be adjusted here.
UBRR0 = 10; //any baud adjusted here.
}

#define VER_ERRO_Wiz5500 //Error detection at W5500 chip R/W

#ifdef VER_ERRO_Wiz5500
uint8_t wc_error; //Error detection variable.
#endif //VER_ERRO_Wiz5500

#define W5500_SPI_VDM_OP 0x00
#define W5500_SPI_FDM_OP_LEN1 0x01
#define W5500_SPI_FDM_OP_LEN2 0x02
#define W5500_SPI_FDM_OP_LEN4 0x03

uint8_t WIZCHIP_READ( uint32_t AddrSel )
{
uint8_t rby;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_FDM_OP_LEN1);
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif

#ifdef VER_ERRO_Wiz5500
wc_error = 0;
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>>16) ) != 0x01 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) ) != 0x02 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) ) != 0x03 )
{ wc_error = 1; }
#else //VER_ERRO_Wiz5500
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
#endif //VER_ERRO_Wiz5500

rby = USART0_SPI_rwby(SPI_RBS);

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
USART0_SPI_CS_deselect;
#endif

return ( rby );
}

uint16_t WIZCHIP_READ_W( uint32_t AddrSel )
{
uint16_t rwo;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_FDM_OP_LEN2);
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif

#ifdef VER_ERRO_Wiz5500
wc_error = 0;
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>>16) ) != 0x01 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) ) != 0x02 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) ) != 0x03 )
{ wc_error = 1; }
#else //VER_ERRO_Wiz5500
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
#endif //VER_ERRO_Wiz5500

rwo = (uint16_t)USART0_SPI_rwby(SPI_RBS) <<8;
rwo |= (uint16_t)USART0_SPI_rwby(SPI_RBS) <<0;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
USART0_SPI_CS_deselect;
#endif

return ( rwo );
}

uint32_t WIZCHIP_READ_DW( uint32_t AddrSel )
{
uint32_t rdwo;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_FDM_OP_LEN4);
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif

USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
rdwo = (uint32_t)(USART0_SPI_rwby(SPI_RBS)) <<24;
rdwo |= (uint32_t)(USART0_SPI_rwby(SPI_RBS)) <<16;
rdwo |= (uint32_t)(USART0_SPI_rwby(SPI_RBS)) << 8;
rdwo |= (uint32_t)(USART0_SPI_rwby(SPI_RBS)) << 0;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
USART0_SPI_CS_deselect;
#endif

return ( rdwo );
}

void WIZCHIP_READ_BUF( uint32_t AddrSel, uint8_t* pBuf, uint16_t len )
{
uint16_t i;
uint16_t k = 0;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;

#ifdef VER_ERRO_Wiz5500
wc_error = 0;
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>>16) ) != 0x01 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) ) != 0x02 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) ) != 0x03 )
{ wc_error = 1; }
#else //VER_ERRO_Wiz5500
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
#endif //VER_ERRO_Wiz5500

for ( i = 0; i < len; i++ )
{
pBuf[i] = USART0_SPI_rwby(SPI_RBS);
}
USART0_SPI_CS_deselect;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_READ | W5500_SPI_FDM_OP_LEN4);
for ( i = 0; i < len/4; i++ )
{

#ifdef VER_ERRO_Wiz5500
wc_error = 0;
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>>16) ) != 0x01 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) ) != 0x02 )
{ wc_error = 1; }
if ( USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) ) != 0x03 )
{ wc_error = 1; }
#else //VER_ERRO_Wiz5500
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
#endif //VER_ERRO_Wiz5500

pBuf[k++] = USART0_SPI_rwby(SPI_RBS);
pBuf[k++] = USART0_SPI_rwby(SPI_RBS);
pBuf[k++] = USART0_SPI_rwby(SPI_RBS);
pBuf[k++] = USART0_SPI_rwby(SPI_RBS);
AddrSel = WIZCHIP_OFFSET_INC(AddrSel,4);
}
AddrSel -= 1; // change W5500_SPI_FDM_OP_LEN4 to W5500_SPI_FDM_OP_LEN2
len %= 4; // for the rest data
if ( len >= 2 )
{
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
pBuf[k++] = USART0_SPI_rwby(SPI_RBS);
pBuf[k++] = USART0_SPI_rwby(SPI_RBS);
AddrSel = WIZCHIP_OFFSET_INC(AddrSel,2);
}
len %= 2;
if ( len )
{
AddrSel -= 1; // change W5500_SPI_FDM_OP_LEN2 to W5500_SPI_FDM_OP_LEN1
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
pBuf[k] = USART0_SPI_rwby(SPI_RBS);
}
#else
#error “Unsupported WIZCHIP_IO_MODE_SPI in W5500 !!!”
#endif
}

void WIZCHIP_WRITE( uint32_t AddrSel, uint8_t wby )
{
#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_FDM_OP_LEN1);
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif

USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
USART0_SPI_rwby( wby );

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
USART0_SPI_CS_deselect;
#endif
}

void WIZCHIP_WRITE_W( uint32_t AddrSel, uint16_t wwo )
{
#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_FDM_OP_LEN2);
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif

USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
USART0_SPI_rwby( (uint8_t)(wwo>>8) );
USART0_SPI_rwby( (uint8_t)(wwo>>0) );

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
USART0_SPI_CS_deselect;
#endif
}

void WIZCHIP_WRITE_DW( uint32_t AddrSel, uint32_t wdwo )
{
#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_FDM_OP_LEN4);
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif

USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
USART0_SPI_rwby( (uint8_t)(wdwo>>24) );
USART0_SPI_rwby( (uint8_t)(wdwo>>16) );
USART0_SPI_rwby( (uint8_t)(wdwo>> 8) );
USART0_SPI_rwby( (uint8_t)(wdwo>> 0) );

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
USART0_SPI_CS_deselect;
#endif
}

void WIZCHIP_WRITE_BUF( uint32_t AddrSel, uint8_t* pBuf, uint16_t len )
{
uint16_t i;
uint16_t k = 0;

#if ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_VDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_VDM_OP);
USART0_SPI_CS_select;
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
for ( i = 0; i < len; i++ )
{
USART0_SPI_rwby( pBuf[i] );
}
USART0_SPI_CS_deselect;
#elif ( WIZCHIP_IO_MODE == WIZCHIP_IO_MODE_SPI_FDM )
AddrSel |= (W5500_SPI_WRITE | W5500_SPI_FDM_OP_LEN4);
for ( i = 0; i < len/4; i++ )
{
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
USART0_SPI_rwby( pBuf[k++] );
USART0_SPI_rwby( pBuf[k++] );
USART0_SPI_rwby( pBuf[k++] );
USART0_SPI_rwby( pBuf[k++] );
AddrSel = WIZCHIP_OFFSET_INC(AddrSel,4);
}
AddrSel -= 1; // change W5500_SPI_FDM_OP_LEN4 to W5500_SPI_FDM_OP_LEN2
len %= 4; // for the rest data
if ( len >= 2 )
{
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
USART0_SPI_rwby( pBuf[k++] );
USART0_SPI_rwby( pBuf[k++] );
AddrSel = WIZCHIP_OFFSET_INC(AddrSel,2);
}
len %= 2;
if ( len )
{
AddrSel -= 1; // change W5500_SPI_FDM_OP_LEN2 to W5500_SPI_FDM_OP_LEN1
USART0_SPI_rwby( (uint8_t)(AddrSel>>16) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 8) );
USART0_SPI_rwby( (uint8_t)(AddrSel>> 0) );
USART0_SPI_rwby( pBuf[k] );
}
#else
#error “Unsupported WIZCHIP_IO_SPI in W5500 !!!”
#endif
}

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