Using FPGA, cannot OPEN socket


Hi, I am using WIZ811MJ, attached to FPGA in parallel mode. The initialization looks good, and module is replying to ping. However, whenever I’m trying to open a socket (UDP or TCP), there is no reaction to writing to Sx_CR, it does not get cleared and Sx_SR remains at 0.

I have checked quite few times the datasheet, but obviously I am still missing something.

Here’s the output from signal analyzer:

Would be grateful for any pointers.


Okay, the problem was in hardware - two of the address lines were swapped so that instead of writing to the command register it ended up in the buffer memory. Now the socket opens fine.