SPI not performing. MISO continously sends 0x01, 0x02, 0x03

Hi all,

I am using the MSP430F5529LP to connect with the wiz550io over SPI. Now I have the following problem. The wiz550io keeps sending the following bytes 0x01, 0x02, 0x03. see the picture

Not sure what is going on here. Even when i disconnected the MOSI pin and only let the MISO pin connected, it keeps sending 0x01, 0x02, 0x03.

I initialize the w5500 trough the following function:

uint8_t init_w5500(void)
{
uint8_t tmp;
uint8_t memsize[2][8] = { { 2, 2, 2, 2, 2, 2, 2, 2 },
                          { 2, 2, 2, 2, 2, 2, 2, 2 } };
GPIO_setOutputHighOnPin(GPIO_PORT_P2, GPIO_PIN5);

GPIO_setAsOutputPin(GPIO_PORT_P2, GPIO_PIN5);       // N_RESET
GPIO_setAsInputPinWithPullDownResistor(GPIO_PORT_P2, GPIO_PIN4);

GPIO_setOutputLowOnPin(GPIO_PORT_P2, GPIO_PIN5);    // RESET Device

__delay_cycles(1000);
GPIO_setOutputHighOnPin(GPIO_PORT_P2, GPIO_PIN5);

reg_wizchip_cs_cbfunc(wizchip_select, wizchip_deselect);
reg_wizchip_spi_cbfunc(wizchip_read, wizchip_write);

while(GPIO_getInputPinValue(GPIO_PORT_P2, GPIO_PIN4) == GPIO_INPUT_PIN_LOW);
/* wizchip initialize*/
if (ctlwizchip(CW_INIT_WIZCHIP, (void*) memsize) == -1) {

    return STATUS_FAIL;
}

return STATUS_SUCCESS;
}

And then a function to set up the network

**uint8_t** **init_network** ( **void** )

{

/* wizchip netconf */

**if** ( **ctlnetwork** ( *CN_SET_NETINFO* , ( **void** *) &gWIZNETINFO) == -1){

**return** STATUS_FAIL;

}

**return** STATUS_SUCCESS;

}

SPI init & functions code can be found here below:

uint8_t init_spi(void)
{
    //Set P2.7 for slave select
    GPIO_setAsOutputPin(GPIO_PORT_P2, GPIO_PIN7);

    //Set P2.7 high for slave deselect
    GPIO_setOutputHighOnPin(GPIO_PORT_P2, GPIO_PIN7);

    //P3.0,1,2 select for SPI configurations
    GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P3, GPIO_PIN0 + GPIO_PIN1 + GPIO_PIN2);

    //Initialize Master
    USCI_B_SPI_initMasterParam param = {0};
    param.selectClockSource = USCI_B_SPI_CLOCKSOURCE_SMCLK;
    param.clockSourceFrequency = UCS_getSMCLK();
    param.desiredSpiClock = SPICLK;
    param.msbFirst = USCI_B_SPI_MSB_FIRST;
    param.clockPhase = USCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT;
    param.clockPolarity = USCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW;

    if(USCI_B_SPI_initMaster(USCI_B0_BASE, &param) != STATUS_SUCCESS){

        return STATUS_FAIL;
    }

    //Enable SPI module
    USCI_B_SPI_enable(USCI_B0_BASE);

    // Enable USCI_B1 RX interrupt
    USCI_B_SPI_clearInterrupt(USCI_B0_BASE, USCI_B_SPI_RECEIVE_INTERRUPT);
    USCI_B_SPI_enableInterrupt(USCI_B0_BASE, USCI_B_SPI_RECEIVE_INTERRUPT);

    //success
    return STATUS_SUCCESS;
}

void wizchip_select ( void )

{

while (USCI_B_SPI_isBusy(USCI_B0_BASE));

GPIO_setOutputLowOnPin(GPIO_PORT_P2, GPIO_PIN7);

__delay_cycles(2);

}

voidwizchip_deselect(void)

{

while( USCI_B_SPI_isBusy(USCI_B0_BASE));

__delay_cycles(2);

GPIO_setOutputHighOnPin(GPIO_PORT_P2, GPIO_PIN7);

}

uint8_t wizchip_read()

{

while( USCI_B_SPI_isBusy(USCI_B0_BASE));

return USCI_B_SPI_receiveData** (USCI_B0_BASE);

}

void wizchip_write( uint8_t wb)

{

//USCI_B1 TX buffer ready?

while(! USCI_B_SPI_getInterruptStatus** (USCI_B1_BASE, USCI_B_SPI_TRANSMIT_INTERRUPT));

USCI_B_SPI_transmitData(USCI_B0_BASE, wb);

return;

}

I’m using the TCP server loopback function to test my set-up.

I hope someone can help me out.

Regards,

Caspar

Hi ~ Caspar

It has sending the bytes 0x01,0x02,0x03 and this operation is right. We did designed it that it has sending sequential data than meaningless data.

thanks
BR
irina

Hi Kim,

I’m not sure if I understand correctly what you mean. So it first sends the data and after that it sends 3 dummy bytes or it sends dummy bytes when it doesn’t receive anything over the MOSI?

Hi Caspar

W5500 SPI Frame is sending the 4bytes for data write operation or read operation.
If it operates 1byte data writing, MOSI has sending ADDH,ADDL,OP,DATA sequentially and MISO also has sending 0x1,0x2,0x3 sequentially.

That all operation(MOSI, MISO) has run concurrently.

thanks,
BR
irina