Hello everyone, I’m very much new to VHDL programming and as a part of my final year project I am required to use the W5500 LAN module to transmit data. To test my code I used socket zero and loaded data xFF and ran the program, but on the Wireshark, the UDP data received shows no data just the headers. I don’t understand why the data is not sent with the UDP/IP packet.
The program I developed worked as follows,
- Loaded data into tx buffer
- selected mode of the socket
- opened the socket
- send the data
is the order wrong? Should I load the data only after opening the socket?
We recommend that you load data into the tx buffer after opening a socket use it.
I think num1 should be done in the order between num3 and num4.
I loaded the data into the tx buffer of socket zero after I opened the socket but the UDP packet received still has no data only headers, what may be the reason for this? I loaded data xFF into the register.
I think I recommend to see you 4.4 UDP in as below link .
Also, you should write the value in the SHAR( Mac address) .
I tried doing the process in the same order as mentioned in the pdf still the data is not being transferred only the headers I also tried changing the socket from 0 to 1, what could be the potential reasons for this
I’m also sorry to hear that you wrote the code normally but it doesn’t work.
I think you need to check the your source code.
I think you would like to see the code in the link below and compare it with your code.
GitHub - Wiznet/ioLibrary_Driver: ioLibrary_Driver can be used for the application design of WIZnet TCP/IP chips as W5500, W5300, W5200, W5100 W5100S. → Independent of MCU, only W5x00 related code exists
https://wiznet-iolibrary.github.io/ → Example
Is just wanted to clarify a doubt I tried sending the data through the ethernet cable to another computer without changing my code. I received the UDP packet same as before with no data but how can the data still come to the computer when the hardware and IP address of the new computer is different ?
Hi George, I am facing the same issue except in TCP mode. I was wondering if you have found any solution to your problem? Id very much like to know. Thanks in advance
I just added a new block for clock and it is corrected
Thanks for the prompt reply, but where did you add the block for clock? In your VHDL code or while initializing the registers? Could you maybe give some more details?
I added the clock to the block which loaded data to the register
I’m new to VHDL and trying to send or receive data from FPGA using W5500 Module. I’m not sure how to start, any help would be highly appreciable…