W5500 Socket TX Buffer

I’m having issues transmitting data over SPI to the W5500 from a TI MSP430x chipset and having a correct send over TCP. I have the W5500 set as the server and connect to it using a simple python script as a client for testing.

I have a simple program on the MSP430x chip where I will read the current Sn_TX_WR register pointer value, translate this to ASCII and store it as 4-byte data value which I then pass to the Sn TX Buffer starting at Sn_TX_WR pointer address. I then increment the pointer by 4, write this into Sn_TX_WR, and then issue a ‘send’ command to the Sn_CR register. All of this happens whenever the python script acting as a client sends data to the W5500 socket over TCP (it likewise is sending a random 4-byte ASCII string).

My issue:
All of this works just beautifully for cases where the Sn_TX_WR register pointer is hex ‘x0xx’ or ‘x8xx’, in other words, whenever the third byte in the address is a ‘0’ or ‘8’. For any other address value, I seem to be unable to write to the TX buffer nor receive anything but garbage data over the TCP to my python test bench client.

example output from the TI MSP chip debug console:
txAddr: 0x60fb
txData[0]: 0x36 (6) txData[1]: 0x30 (0) txData[2]: 0x46 (f) txData[3]: 0x42 (b)
txAddr: 0x60ff
txData[0]: 0x36 (6) txData[1]: 0x30 (0) txData[2]: 0x46 (f) txData[3]: 0x46 (f)
txAddr: 0x6103
txData[0]: 0x36 (6) txData[1]: 0x31 (1) txData[2]: 0x30 (0) txData[3]: 0x33 (3)

And the corresponding output from the TCP as displayed from the python output (verified through wireshark):

so you’ll see the first two transmissions are as expected, but the third the python client should have received ‘6103’ (or hex values 0x36 0x31 0x30 0x33) but instead received hex values 0x05 0x67 0x96 0xf2

If anyone has any clue as to why I’m only able to access and use 1/8th of the memory in the buffer I would be appreciative. It should be noted that the Sn_RX Buffer does not have this issue at all. Just the TX Buffer.

EDIT for clarification
I have tried setting different values for the TXBuffer size, anywhere from 1k to 16k. I am only using one socket.

Here is a snippet of my code used to transmit data to the socket TX buffer as well as print out the data seen in the TI MSP chip debug console:

void send_TCP(SPI_Handle* handle, char socket, uint16_t txSz, char* data) {
	char spiData[2], txRD[2], txWR[2], temp;
	uint16_t txAddr;
	char txData[4];
	int i;

	/* read 2 bytes from Sn_TX_WR register (0x0024 - 0x0025) */
    	spiSend(handle, Sn_TX_WR0, socket, REG, REG_READ, CTRL_LEN_2, (unsigned char*)txRD);

	/* store TX_WR current value as ptr address */
	txAddr = ((uint16_t)txRD[0] << 8) | (uint16_t)txRD[1];
	System_printf("txAddr: 0x%.4x\n",txAddr);

	/* translate ptr address to ASCII and store in reverse order in data array */
	for(i=0;i<4;i++) {
		temp = (txAddr >> 4*(3-i))&0x000F;
		txData[i] = (temp <= 0x09)?(temp + 0x30):(temp + 0x37);
		System_printf("txData[%d]: 0x%.2x (%.1x) ",i,txData[i],temp);

	/* send data array to Sn TX Buf starting at ptr address */
	spiSend(handle, txAddr, socket, TX, REG_WRITE, CTRL_LEN_4, (unsigned char*)txData);

	/* increment ptr by transmit length (4) */
	txAddr += txSz;

	/* overwrite Sn_TX_WR registers with new ptr value */
	txWR[0] = (uint8_t) (txAddr >> 8);
	txWR[1] = (uint8_t) txAddr;
	spiSend(handle, Sn_TX_WR0, socket, REG, REG_WRITE, CTRL_LEN_2, (unsigned char*)txWR);

	/* send Sn TX data */
	spiData[0] = Sn_SEND;
	spiSend(handle, Sn_CR, socket, REG, REG_WRITE, CTRL_LEN_1, (unsigned char*)spiData);

Where’s address pointer masking to stay within the cyclical buffer? See W5100 datasheet chapter