void main(void)
{
// send data
//Uint16 rdata; // received data
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
InitSysCtrl();
// Step 2. Initialize GPIO:
//
InitSpiaGpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
spi_fifo_init(); // Initialize the Spi FIFO
spi_init(); // init SPI
// Step 5. User specific code:
// Interrupts are not used in this example.
for(;
{
// Transmit data
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
MR_reg ();
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 =1; // SCS asserted low for data transmission
GAR();
GpioDataRegs.GPBSET.bit.GPIO57 = 1; // SCS asserted high to inidcate end of the frame.
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
SUBR();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
SHAR();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
SIPR();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
Sn_MR();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 =1;
Sn_PORT();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
opencmd();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
Sn_DIPR();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
Sn_DPORT();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
listencmd ();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
txdata ();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1;
sendcmd ();
GpioDataRegs.GPBSET.bit.GPIO57 = 1;
// Wait until data is received
//while(SpiaRegs.SPIFFRX.bit.RXFFST !=1) { }
// Check against sent data
//rdata = SpiaRegs.SPIRXBUF;
//if(rdata != sdata) error();
asm (" NOP");
}
}
// spi frame data functions:
//*********************************************************************************
void MR_reg ()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata =0x04;
spi_xmit(sdata);
sdata = 0x10;
spi_xmit(sdata);
}
void GAR()
{
//ip address mac SUBR SHAR SIPR are set here
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
sdata = 0xC0;
spi_xmit(sdata);
sdata = 0xA8;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
}
void SUBR()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x05;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
sdata = 0xFF;
spi_xmit(sdata);
sdata = 0xFF;
spi_xmit(sdata);
sdata = 0xFF;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
}
void SHAR()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x09;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x08;
spi_xmit(sdata);
sdata = 0xDC;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
sdata = 0x02;
spi_xmit(sdata);
sdata = 0x03;
spi_xmit(sdata);
}
void SIPR ()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x0F;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
sdata = 0xC0;
spi_xmit(sdata);
sdata = 0xA8;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x02;
spi_xmit(sdata);
}
//===========================================================================
// *****************************************
void Sn_MR()
{
// Sn3_MR reg
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
}
void Sn_PORT()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0x13;
spi_xmit(sdata);
sdata= 0x88;
spi_xmit(sdata);
}
void opencmd()
{
//Sn_CR reg
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
}
void Sn_DIPR()
{
//destination IP address
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0xC0;
spi_xmit(sdata);
sdata = 0xC0;
spi_xmit(sdata);
sdata = 0xA8;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x0B;
spi_xmit(sdata);
}
void Sn_DPORT()
{
//destination port number
sdata = 0x00;
spi_xmit(sdata);
sdata= 0x10;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0x13;
spi_xmit(sdata);
sdata = 0x88;
spi_xmit(sdata);
}
void listencmd () // working in tcp server mode changed to TCP client mode listen chnaged to connect
{
//Sn_CR
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0x04;
spi_xmit(sdata);
}
//*******************************************************
void txdata ()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x14;
spi_xmit(sdata);
sdata = 0xAA;
spi_xmit(sdata);
sdata = 0xAA;
spi_xmit(sdata);
}
//*****************************************************
void sendcmd()
{
sdata = 0x00;
spi_xmit(sdata);
sdata = 0x01;
spi_xmit(sdata);
sdata = 0x0C;
spi_xmit(sdata);
sdata = 0x20;
spi_xmit(sdata);
}
// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:
void delay_loop()
{
long i;
for (i = 0; i < 1000000; i++) {}
}
void error(void)
{
__asm(" ESTOP0"); // Test failed!! Stop!
for (;;);
}
void spi_init()
{
SpiaRegs.SPICCR.all =0x0007; // Reset on, rising edge, 16-bit char bits
SpiaRegs.SPICTL.all =0x0006; // Enable master mode, normal phase,
// enable talk, and SPI int disabled.
SpiaRegs.SPIBRR =0x007F;
SpiaRegs.SPICCR.all =0x0097; // Relinquish SPI from Reset
SpiaRegs.SPIPRI.bit.FREE = 1; // Set so breakpoints don’t disturb xmission
}
void spi_xmit(uint8 a)
{
SpiaRegs.SPITXBUF=a;
}
void spi_fifo_init()
{
// Initialize SPI FIFO registers
SpiaRegs.SPIFFTX.all=0xE040;
SpiaRegs.SPIFFRX.all=0x204f;
SpiaRegs.SPIFFCT.all=0x0;
}